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BASEMACHINE.CPU
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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE Machine [
<!ELEMENT Machine (PunctChar*, Field*, FileChannel*, Register*, RegisterArray*, ConditionBit*, RAM*, Set*, Test*, Increment*, Shift*, Logical*, Arithmetic*, Branch*, TransferRtoR*, TransferRtoA*, TransferAtoR*, Decode*, SetCondBit*, IO*, MemoryAccess*, End, Comment*, EQU*, FetchSequence, MachineInstruction*, HighlightingInfo?, LoadingInfo?, IndexingInfo?, ProgramCounterInfo?, ModuleWindowsInfo?) >
<!ATTLIST Machine name CDATA "unnamed">
<!ELEMENT PunctChar EMPTY>
<!ATTLIST PunctChar char CDATA #REQUIRED use (symbol|token|label|comment|pseudo|illegal) #REQUIRED>
<!ELEMENT Field (FieldValue*)>
<!ATTLIST Field name CDATA #REQUIRED type (required|optional|ignored) #REQUIRED numBits CDATA #REQUIRED relativity (absolute|pcRelativePreIncr|pcRelativePostIncr) #REQUIRED defaultValue CDATA #REQUIRED signed (true|false) #REQUIRED id ID #REQUIRED>
<!ELEMENT FieldValue EMPTY>
<!ATTLIST FieldValue name CDATA #REQUIRED value CDATA #REQUIRED>
<!ELEMENT FileChannel EMPTY>
<!ATTLIST FileChannel file CDATA #REQUIRED id CDATA #REQUIRED>
<!ELEMENT Register EMPTY>
<!ATTLIST Register name CDATA #REQUIRED width CDATA #REQUIRED initialValue CDATA #REQUIRED readOnly (true|false) "false" id ID #REQUIRED>
<!ELEMENT RegisterArray (Register+)>
<!ATTLIST RegisterArray name CDATA #REQUIRED width CDATA #REQUIRED length CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT ConditionBit EMPTY>
<!ATTLIST ConditionBit name CDATA #REQUIRED bit CDATA #REQUIRED register IDREF #REQUIRED halt (true|false) "false" id ID #REQUIRED>
<!ELEMENT RAM EMPTY>
<!ATTLIST RAM name CDATA #REQUIRED length CDATA #REQUIRED id ID #REQUIRED cellSize CDATA "8">
<!ELEMENT Increment EMPTY>
<!ATTLIST Increment name CDATA #REQUIRED register IDREF #REQUIRED overflowBit IDREF #IMPLIED carryBit IDREF #IMPLIED delta CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Arithmetic EMPTY>
<!ATTLIST Arithmetic name CDATA #REQUIRED type (ADD|SUBTRACT|MULTIPLY|DIVIDE) #REQUIRED source1 IDREF #REQUIRED source2 IDREF #REQUIRED destination IDREF #REQUIRED overflowBit IDREF #IMPLIED carryBit IDREF #IMPLIED id ID #REQUIRED>
<!ELEMENT TransferRtoR EMPTY>
<!ATTLIST TransferRtoR name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT TransferRtoA EMPTY>
<!ATTLIST TransferRtoA name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED index IDREF #REQUIRED indexStart CDATA #IMPLIED indexNumBits CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT TransferAtoR EMPTY>
<!ATTLIST TransferAtoR name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED index IDREF #REQUIRED indexStart CDATA #IMPLIED indexNumBits CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT Shift EMPTY>
<!ATTLIST Shift name CDATA #REQUIRED source IDREF #REQUIRED destination IDREF #REQUIRED type (logical | arithmetic | cyclic) #REQUIRED direction (right | left) #REQUIRED distance CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Branch EMPTY>
<!ATTLIST Branch name CDATA #REQUIRED amount CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Logical EMPTY>
<!ATTLIST Logical name CDATA #REQUIRED source1 IDREF #REQUIRED source2 IDREF #REQUIRED destination IDREF #REQUIRED type (AND | OR | NAND | NOR | XOR | NOT) #REQUIRED id ID #REQUIRED>
<!ELEMENT Set EMPTY>
<!ATTLIST Set name CDATA #REQUIRED register IDREF #REQUIRED start CDATA #REQUIRED numBits CDATA #REQUIRED value CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Test EMPTY >
<!ATTLIST Test name CDATA #REQUIRED register IDREF #REQUIRED start CDATA #REQUIRED numBits CDATA #REQUIRED comparison (EQ | NE | LT | GT | LE | GE ) #REQUIRED value CDATA #REQUIRED omission CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Decode EMPTY >
<!ATTLIST Decode name CDATA #REQUIRED ir IDREF #REQUIRED id ID #REQUIRED>
<!ELEMENT IO EMPTY >
<!ATTLIST IO name CDATA #REQUIRED direction (input | output) #REQUIRED type (integer | ascii | unicode) #REQUIRED buffer IDREF #REQUIRED connection CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT MemoryAccess EMPTY >
<!ATTLIST MemoryAccess name CDATA #REQUIRED direction (read | write ) #REQUIRED memory IDREF #REQUIRED data IDREF #REQUIRED address IDREF #REQUIRED id ID #REQUIRED>
<!ELEMENT SetCondBit EMPTY >
<!ATTLIST SetCondBit name CDATA #REQUIRED bit IDREF #REQUIRED value (0 | 1) #REQUIRED id ID #REQUIRED>
<!ELEMENT End EMPTY>
<!ATTLIST End id ID #REQUIRED>
<!ELEMENT Comment EMPTY>
<!ATTLIST Comment name CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Microinstruction EMPTY>
<!ATTLIST Microinstruction microRef IDREF #REQUIRED>
<!ELEMENT MachineInstruction (Microinstruction*)>
<!ATTLIST MachineInstruction name CDATA #REQUIRED opcode CDATA #REQUIRED instructionFormat CDATA #REQUIRED assemblyFormat CDATA #REQUIRED instructionColors CDATA #REQUIRED assemblyColors CDATA #REQUIRED>
<!ELEMENT FetchSequence (Microinstruction*) >
<!ELEMENT EQU EMPTY>
<!ATTLIST EQU name CDATA #REQUIRED value CDATA #REQUIRED>
<!ELEMENT HighlightingInfo (RegisterRAMPair*)>
<!ELEMENT RegisterRAMPair EMPTY>
<!ATTLIST RegisterRAMPair register IDREF #REQUIRED ram IDREF #REQUIRED dynamic (true|false) #REQUIRED>
<!ELEMENT LoadingInfo EMPTY>
<!ATTLIST LoadingInfo ram IDREF #IMPLIED startingAddress CDATA "0">
<!ELEMENT IndexingInfo EMPTY>
<!ATTLIST IndexingInfo indexFromRight CDATA "false">
<!ELEMENT ProgramCounterInfo EMPTY>
<!ATTLIST ProgramCounterInfo programCounter IDREF #REQUIRED>
<!ELEMENT ModuleWindowsInfo ((RegisterWindowInfo | RegisterArrayWindowInfo | RAMWindowInfo)*) >
<!ELEMENT RegisterWindowInfo EMPTY>
<!ATTLIST RegisterWindowInfo top CDATA "50" left CDATA "50" width CDATA "300" height CDATA "150" base (Decimal|Binary|Hexadecimal|Ascii|UnsignedDec|Unicode) "Decimal">
<!ELEMENT RegisterArrayWindowInfo EMPTY>
<!ATTLIST RegisterArrayWindowInfo array IDREF #REQUIRED top CDATA "50" left CDATA "50" width CDATA "300" height CDATA "150" base (Decimal|Binary|Hexadecimal|Ascii|UnsignedDec|Unicode) "Decimal">
<!ELEMENT RAMWindowInfo EMPTY>
<!ATTLIST RAMWindowInfo ram IDREF #REQUIRED cellSize CDATA "1" top CDATA "50" left CDATA "50" width CDATA "450" height CDATA "450" contentsbase (Decimal|Binary|Hexadecimal|Ascii|UnsignedDec|Unicode) "Decimal" addressbase (Decimal|Binary|Hexadecimal) "Decimal">
]>
<Machine name="BASEMACHINE.CPU" >
<!--............. Punctuation Options .............-->
<PunctChar char="!" use="symbol" />
<PunctChar char="#" use="symbol" />
<PunctChar char="$" use="symbol" />
<PunctChar char="%" use="symbol" />
<PunctChar char="&" use="symbol" />
<PunctChar char="^" use="symbol" />
<PunctChar char="_" use="symbol" />
<PunctChar char="`" use="symbol" />
<PunctChar char="*" use="symbol" />
<PunctChar char="?" use="symbol" />
<PunctChar char="@" use="symbol" />
<PunctChar char="~" use="symbol" />
<PunctChar char="+" use="symbol" />
<PunctChar char="-" use="symbol" />
<PunctChar char="(" use="token" />
<PunctChar char=")" use="token" />
<PunctChar char="," use="token" />
<PunctChar char="/" use="token" />
<PunctChar char="=" use="token" />
<PunctChar char="[" use="token" />
<PunctChar char="\" use="token" />
<PunctChar char="]" use="token" />
<PunctChar char="{" use="token" />
<PunctChar char="|" use="token" />
<PunctChar char="}" use="token" />
<PunctChar char="." use="pseudo" />
<PunctChar char=":" use="label" />
<PunctChar char=";" use="comment" />
<!--......... machine instruction fields ............-->
<Field name="REGISTER" type="required" numBits="16" relativity="absolute" signed="true" defaultValue="0" id="model.Field4cca7504">
</Field>
<Field name="ADDRESS" type="required" numBits="12" relativity="absolute" signed="true" defaultValue="0" id="model.Field6ddf9cd9">
</Field>
<Field name="OPCODE" type="required" numBits="4" relativity="absolute" signed="true" defaultValue="0" id="model.Field2d947622">
</Field>
<!--............. FileChannels .................-->
<!-- none -->
<!--............. registers .....................-->
<Register name="AC" width="16" initialValue="0" readOnly="false" id="model.module.Register50545a31" />
<Register name="AR" width="12" initialValue="0" readOnly="false" id="model.module.Register522127fd" />
<Register name="DR" width="16" initialValue="0" readOnly="false" id="model.module.Register40c04264" />
<Register name="E" width="1" initialValue="0" readOnly="false" id="model.module.Register4a13bc6f" />
<Register name="I" width="1" initialValue="0" readOnly="false" id="model.module.Register6c2c3175" />
<Register name="IR" width="16" initialValue="0" readOnly="false" id="model.module.Registerd48ce13" />
<Register name="PC" width="12" initialValue="0" readOnly="false" id="model.module.Register1847e82b" />
<Register name="STATUS" width="1" initialValue="0" readOnly="false" id="model.module.Register4492786d" />
<!--............. register arrays ...............-->
<!-- none -->
<!--............. condition bits ................-->
<ConditionBit name="CARRYBIT" bit="0" register="model.module.Register4a13bc6f" halt="false" id="model.module.ConditionBit65738697" />
<ConditionBit name="HALT BIT" bit="0" register="model.module.Register4492786d" halt="true" id="model.module.ConditionBit2a580f69" />
<!--............. rams ..........................-->
<RAM name="MAIN" length="4096" cellSize="16" id="model.module.RAM6f003753" />
<!--............. set ...........................-->
<!-- none -->
<!--............. test ..........................-->
<!-- none -->
<!--............. increment .....................-->
<Increment name="PC = PC + 1" register="model.module.Register1847e82b" delta="1" id="model.microinstruction.Increment101219a1" />
<!--............. shift .........................-->
<!-- none -->
<!--............. logical .......................-->
<!-- none -->
<!--............. arithmetic ....................-->
<Arithmetic name="AC<-AC+DR" type="ADD" source1="model.module.Register50545a31" source2="model.module.Register40c04264" destination="model.module.Register50545a31" carryBit="model.module.ConditionBit65738697" id="model.microinstruction.Arithmetic4a20a32c" />
<!--............. branch ........................-->
<!-- none -->
<!--............. transferRtoR ..................-->
<TransferRtoR name="AR <-IR(4-15)" source="model.module.Registerd48ce13" srcStartBit="4" dest="model.module.Register522127fd" destStartBit="0" numBits="12" id="model.microinstruction.TransferRtoR24e80f23" />
<TransferRtoR name="AR<-PC" source="model.module.Register1847e82b" srcStartBit="0" dest="model.module.Register522127fd" destStartBit="0" numBits="12" id="model.microinstruction.TransferRtoR41533fe9" />
<!--............. transferRtoA ..................-->
<!-- none -->
<!--............. transferAtoR ..................-->
<!-- none -->
<!--............. decode ........................-->
<Decode name="DECODE IR" ir="model.module.Registerd48ce13" id="model.microinstruction.Decode15f7efdc" />
<!--............. set condition bit .............-->
<SetCondBit name="HALT" bit="model.module.ConditionBit2a580f69" value="1" id="model.microinstruction.SetCondBit49b35c80" />
<!--............. io ............................-->
<IO name="INPUT" direction="input" type="integer" buffer="model.module.Register50545a31" connection="[Console]" id="model.microinstruction.IO57a19eac" />
<IO name="OUTPUT" direction="output" type="integer" buffer="model.module.Register50545a31" connection="[Console]" id="model.microinstruction.IO529a430f" />
<!--............. memory access .................-->
<MemoryAccess name="DR<-MAIN[AR]" direction="read" memory="model.module.RAM6f003753" data="model.module.Register40c04264" address="model.module.Register522127fd" id="model.microinstruction.MemoryAccess701f9372" />
<MemoryAccess name="IR<-MAIN[AR]" direction="read" memory="model.module.RAM6f003753" data="model.module.Registerd48ce13" address="model.module.Register522127fd" id="model.microinstruction.MemoryAccess288f1462" />
<MemoryAccess name="MAIN[AR]<-AC" direction="read" memory="model.module.RAM6f003753" data="model.module.Register50545a31" address="model.module.Register522127fd" id="model.microinstruction.MemoryAccess62118cd4" />
<!--............. end ...........................-->
<End id="model.microinstruction.End4cd32761" />
<!--............. comment ...........................-->
<!-- none -->
<!--............. global equs ..................-->
<!-- none -->
<!--............. fetch sequence ................-->
<FetchSequence>
<Microinstruction microRef="model.microinstruction.TransferRtoR41533fe9" />
<Microinstruction microRef="model.microinstruction.TransferRtoR24e80f23" />
<Microinstruction microRef="model.microinstruction.Increment101219a1" />
<Microinstruction microRef="model.microinstruction.MemoryAccess288f1462" />
<Microinstruction microRef="model.microinstruction.Decode15f7efdc" />
</FetchSequence>
<!--............. machine instructions ..........-->
<MachineInstruction name="ADD" opcode="4" instructionFormat="OPCODE ADDRESS" assemblyFormat="OPCODE ADDRESS" instructionColors="#d6ebdb #b9ced3" assemblyColors="#d6ebdb #b9ced3" >
<Microinstruction microRef="model.microinstruction.MemoryAccess701f9372" />
<Microinstruction microRef="model.microinstruction.Arithmetic4a20a32c" />
</MachineInstruction>
<MachineInstruction name="STA" opcode="3" instructionFormat="OPCODE ADDRESS" assemblyFormat="OPCODE ADDRESS" instructionColors="#fe8cc7 #aa9bfd" assemblyColors="#fe8cc7 #aa9bfd" >
<Microinstruction microRef="model.microinstruction.MemoryAccess62118cd4" />
<Microinstruction microRef="model.microinstruction.End4cd32761" />
</MachineInstruction>
<MachineInstruction name="HLT" opcode="2" instructionFormat="REGISTER" assemblyFormat="REGISTER" instructionColors="#fad3ab" assemblyColors="#fad3ab" >
<Microinstruction microRef="model.microinstruction.SetCondBit49b35c80" />
<Microinstruction microRef="model.microinstruction.End4cd32761" />
</MachineInstruction>
<MachineInstruction name="OUT" opcode="1" instructionFormat="REGISTER" assemblyFormat="REGISTER" instructionColors="#90f0ce" assemblyColors="#90f0ce" >
<Microinstruction microRef="model.microinstruction.IO529a430f" />
<Microinstruction microRef="model.microinstruction.End4cd32761" />
</MachineInstruction>
<MachineInstruction name="INP" opcode="0" instructionFormat="REGISTER" assemblyFormat="REGISTER" instructionColors="#809ce9" assemblyColors="#809ce9" >
<Microinstruction microRef="model.microinstruction.IO57a19eac" />
<Microinstruction microRef="model.microinstruction.End4cd32761" />
</MachineInstruction>
<!--............. highlighting info .............-->
<HighlightingInfo>
</HighlightingInfo>
<!--............. loading info ..................-->
<LoadingInfo ram="model.module.RAM6f003753" startingAddress="0" />
<!--............. indexing info ............-->
<IndexingInfo indexFromRight="false" />
<!--............. program counter info ..................-->
</Machine>