Forwarding and Stalling

This page lists all possible forwarding paths and is intended to replace all related issue pages.
For each section, it should clearly state the following:

1. From which port the data come
2. To which port the data go
3. In what conditions the path will be used
4. Complete condition formula
5. If the condition is required after some stall.
   1. List all stall situations.
   2. How may cycles the stall may require?
   3. List all condition formulas for each of the stall situations.
6. Consider all the formulas listed in 4, are they compatible with the stalling situations listed in 5.1?

Outside of any forwarding path, following should also be considered:

1. Is there any stalling situation that requires more than one forwarding path?
2. Is there any stalling situation that requires no forwarding?

All flag register to ID stage

1. Source:
   • ALU.flagZVN
   • EX/MEM.flagZVN
2. Destination:
   • PC_Control.flagZVN
3. Some instructions which modify the FLAG register followed by a conditional branch.
4. The formula is complicate, see related commit.
5. No stall required
6. N/A

EX to ALU1

1. Source: EX/MEM.AluResult
2. Destination: ALU.A
3. A non-zero register been written to is used immediately in the next instruction.
4. • ID/EX.isALU1FromRegister and
   • EX/MEM.willWriteALUResultToRegister and
   • ID/EX.ALU1Register!=0 and
   • EX/MEM.writeToRegister==ID/EX.ALU1Register
5. No stall required
6. N/A

EX to ALU2

1. Source: EX/MEM.AluResult
2. Destination: ALU.B
3. A non-zero register been written to is used immediately in the next instruction.
4. • ID/EX.isALU2FromRegister and
   • EX/MEM.willWriteALUResultToRegister and
   • ID/EX.ALU2Register!=0 and
   • EX/MEM.writeToRegister==ID/EX.ALU2Register
5. No stall required
6. N/A

MEM to ALU1

1. Source: MEM/WB.RegWriteData
2. Destination: ALU.A
3. A non-zero register is written to and is used by the second next instruction:
   1. It can be writeAluResult-anotherInstruction-useRegister
   2. or can be loadDataToRegister-useRegister
4. MEM/WB.willWriteToRegister && ID/EX.isALU1FromRegister && ID/EX.ALU1Register!=0 && MEM/WB.writeToRegister==ID/EX.ALU1Register
5. Forwarding case 3.2 requires an one cycle stall before it:
   1. Stall formula: ID/EX.willLoadToRegister && IF/ID.isALU1FromRegister && IF/ID.ALU1Register!=0 && IF/ID.ALU1Register==ID/EX.writeToRegister
6. TODO

MEM to ALU2

1. Source: MEM/WB.RegWriteData
2. Destination: ALU.B
3. A non-zero register is written to and is used by the second next instruction:
   1. It can be writeAluResult-anotherInstruction-useRegister
   2. or can be loadDataToRegister-useRegister
4. MEM/WB.willWriteToRegister && ID/EX.isALU2FromRegister && ID/EX.ALU2Register!=0 && MEM/WB.writeToRegister==ID/EX.ALU2Register
5. Forwarding case 3.2 requires an one cycle stall before it:
   1. Stall formula: ID/EX.willLoadToRegister && IF/ID.isALU2FromRegister && IF/ID.ALU2Register!=0 && IF/ID.ALU2Register==ID/EX.writeToRegister
6. TODO

MEM to MEM

1. Source: MEM/WB.RegWriteData
2. Destination: DataMem.DataIn
3. A non-zero register is loaded to and immediately store from
4. MEM/WB.willWriteToRegister && EX/MEM.willWriteToDataMem && MEM/WB.writeToRegister==EX/MEM.storeFromRegister && MEM/WB.writeToRegister!=0
5. No stall required
6. N/A

EX to ID.BranchRegister

1. Source: EX/MEM.AluResult
2. Destination: PC_Control.target_reg
3. A non-zero register is written to and is later used as the branch target
   1. writeAluResult-something-BranchRegister
   2. writeAluResult-BranchRegister (this case requires stalling)
4. IF/ID.isBranchRegInstruction && EX/MEM.willWriteALUResultToRegister && EX/MEM.writeToRegister!=0 && EX/MEM.writeToRegister==IF/ID.BrachTargetRegister
5. Forwarding case 3.2 requires one cycle stalling
   • Stalling formula: IF/ID.isBranchRegInstruction && ID/EX.willWriteALUResultToRegister && ID/EX.writeToRegister!=0 && ID/EX.writeToRegister==IF/ID.BrachTargetRegister
6. TODO

MEM to ID.BranchRegister

1. Source: MEM/WB.RegWriteData
2. Destination: PC_Control.target_reg
3. A non-zero register is written/load to and is later used as the branch target
   1. writeAluResult-something-something-BranchReg (no stall)
   2. loadToReg-something-BranchReg (stall one cycle)
   3. loadToReg-BranchReg (stall two cycle)
4. IF/ID.isBranchRegInstruction && MEM/WB.willWriteToRegister && MEM/WB.writeToRegister!=0 && MEM/WB.writeToRegister==IF/ID.BrachTargetRegister
5. One or two cycles of stalling required
   • Stalling formula for first cycle of case 3.3: IF/ID.isBranchRegInstruction && ID/EX.willLoadToRegister && IF/ID.BranchTargetRegister!=0 && IF/ID.BranchTargetRegister==ID/EX.writeToRegister
   • Stalling formala for case 3.2 or the second cycle of case 3.3: IF/ID.isBranchRegInstruction && EX/MEM.willLoadToRegister && IF/ID.BranchTargetRegister!=0 && IF/ID.BranchTargetRegister==EX/MEM.writeToRegister
6. TODO