diff --git a/.github/workflows/arch-tests.yml b/.github/workflows/arch-tests.yml index 9b4b31400..3070f67b1 100644 --- a/.github/workflows/arch-tests.yml +++ b/.github/workflows/arch-tests.yml @@ -27,23 +27,23 @@ jobs: - name: Build spike run: | - ci-tests/build-spike + test/act_cross_check/build-spike echo $GITHUB_WORKSPACE/install/bin >> $GITHUB_PATH - name: Build Sail run: | - ci-tests/build-sail + test/act_cross_check/build-sail echo $GITHUB_WORKSPACE/c_emulator >> $GITHUB_PATH - name: Init arch-tests run: | - cd ci-tests/riscof + cd test/act_cross_check/riscof git clone https://github.com/riscv-non-isa/riscv-arch-test - cd riscv-arch-test && git fetch --tags && git checkout tags/3.8.10 + cd riscv-arch-test && git fetch --tags && git checkout tags/3.9 - name: Run RV32E run: | - cd ci-tests/riscof + cd test/act_cross_check/riscof sed -i 's/\(ispec=\)\(.*\)/\1spike\/spike_isa32e.yaml/' config.ini ./run-tests.sh rv32e_work @@ -52,12 +52,12 @@ jobs: with: name: artifacts_rv32e path: | - ci-tests/riscof/rv32e_work/report.html - ci-tests/riscof/rv32e_work/style.css + test/act_cross_check/riscof/rv32e_work/report.html + test/act_cross_check/riscof/rv32e_work/style.css - name: Run RV32I run: | - cd ci-tests/riscof + cd test/act_cross_check/riscof sed -i 's/\(ispec=\)\(.*\)/\1spike\/spike_isa32.yaml/' config.ini ./run-tests.sh rv32i_work @@ -66,12 +66,12 @@ jobs: with: name: artifacts_rv32i path: | - ci-tests/riscof/rv32i_work/report.html - ci-tests/riscof/rv32i_work/style.css + test/act_cross_check/riscof/rv32i_work/report.html + test/act_cross_check/riscof/rv32i_work/style.css - name: Run RV64I run: | - cd ci-tests/riscof + cd test/act_cross_check/riscof sed -i 's/\(ispec=\)\(.*\)/\1spike\/spike_isa64.yaml/' config.ini ./run-tests.sh rv64i_work @@ -80,5 +80,5 @@ jobs: with: name: artifacts_rv64i path: | - ci-tests/riscof/rv64i_work/report.html - ci-tests/riscof/rv64i_work/style.css + test/act_cross_check/riscof/rv64i_work/report.html + test/act_cross_check/riscof/rv64i_work/style.css diff --git a/.gitignore b/.gitignore index 0079a6798..02b277f61 100644 --- a/.gitignore +++ b/.gitignore @@ -7,3 +7,4 @@ _sbuild/ *.o *.a /z3_problems +__pycache__/ diff --git a/build_simulators.sh b/build_simulators.sh index 919caecc6..ea83af0e9 100755 --- a/build_simulators.sh +++ b/build_simulators.sh @@ -10,8 +10,8 @@ function test_build () { fi } -test_build make -j"$(nproc 2> /dev/null || sysctl -n hw.ncpu)" ARCH=RV32 ocaml_emulator/riscv_ocaml_sim_RV32 -test_build make -j"$(nproc 2> /dev/null || sysctl -n hw.ncpu)" ARCH=RV64 ocaml_emulator/riscv_ocaml_sim_RV64 +test_build make -j"$(nproc 2> /dev/null)" ARCH=RV32 ocaml_emulator/riscv_ocaml_sim_RV32 +test_build make -j"$(nproc 2> /dev/null)" ARCH=RV64 ocaml_emulator/riscv_ocaml_sim_RV64 -test_build make -j"$(nproc 2> /dev/null || sysctl -n hw.ncpu)" ARCH=RV32 c_emulator/riscv_sim_RV32 -test_build make -j"$(nproc 2> /dev/null || sysctl -n hw.ncpu)" ARCH=RV64 c_emulator/riscv_sim_RV64 +test_build make -j"$(nproc 2> /dev/null)" ARCH=RV32 c_emulator/riscv_sim_RV32 +test_build make -j"$(nproc 2> /dev/null)" ARCH=RV64 c_emulator/riscv_sim_RV64 diff --git a/ci-tests/riscof/config.ini b/ci-tests/riscof/config.ini deleted file mode 100644 index f39332a31..000000000 --- a/ci-tests/riscof/config.ini +++ /dev/null @@ -1,14 +0,0 @@ -[RISCOF] -ReferencePlugin=sail_cSim -ReferencePluginPath=sail_cSim -DUTPlugin=spike -DUTPluginPath=spike - -[spike] -pluginpath=spike -ispec=spike/spike_isa32.yaml -pspec=spike/spike_platform.yaml -target_run=1 - -[sail_cSim] -pluginpath=sail_cSim diff --git a/ci-tests/riscof/sail_cSim/env/model_test.h b/ci-tests/riscof/sail_cSim/env/model_test.h deleted file mode 100644 index bfceda65d..000000000 --- a/ci-tests/riscof/sail_cSim/env/model_test.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef _COMPLIANCE_MODEL_H -#define _COMPLIANCE_MODEL_H - -#define RVMODEL_HALT \ - li x1, 1; \ - write_tohost: \ - sw x1, tohost, x3; \ - j write_tohost; - -#define RVMODEL_BOOT - -#define RVMODEL_DATA_BEGIN \ - RVMODEL_DATA_SECTION.align 4; \ - .global begin_signature; \ - begin_signature: - -#define RVMODEL_DATA_END \ - .align 4; \ - .global end_signature; \ - end_signature: - -#define RVMODEL_IO_INIT -#define RVMODEL_IO_WRITE_STR(_R, _STR) -#define RVMODEL_IO_CHECK() -#define RVMODEL_IO_ASSERT_GPR_EQ(_S, _R, _I) -#define RVMODEL_IO_ASSERT_SFPR_EQ(_F, _R, _I) -#define RVMODEL_IO_ASSERT_DFPR_EQ(_D, _R, _I) -#define RVMODEL_SET_MSW_INT -#define RVMODEL_CLEAR_MSW_INT -#define RVMODEL_CLEAR_MTIMER_INT -#define RVMODEL_CLEAR_MEXT_INT - -#endif diff --git a/ci-tests/build-sail b/test/act_cross_check/build-sail similarity index 100% rename from ci-tests/build-sail rename to test/act_cross_check/build-sail diff --git a/ci-tests/build-spike b/test/act_cross_check/build-spike similarity index 100% rename from ci-tests/build-spike rename to test/act_cross_check/build-spike diff --git a/test/act_cross_check/riscof/config.ini b/test/act_cross_check/riscof/config.ini new file mode 100644 index 000000000..d78b1113c --- /dev/null +++ b/test/act_cross_check/riscof/config.ini @@ -0,0 +1,14 @@ +[RISCOF] +ReferencePlugin=sail_csim +ReferencePluginPath=sail_csim +DUTPlugin=spike +DUTPluginPath=spike + +[spike] +pluginpath=spike +ispec=spike/spike_isa32e.yaml +pspec=spike/spike_platform.yaml +target_run=1 + +[sail_csim] +pluginpath=sail_csim diff --git a/ci-tests/riscof/run-tests.sh b/test/act_cross_check/riscof/run-tests.sh similarity index 97% rename from ci-tests/riscof/run-tests.sh rename to test/act_cross_check/riscof/run-tests.sh index 1577561ba..e18f63562 100755 --- a/ci-tests/riscof/run-tests.sh +++ b/test/act_cross_check/riscof/run-tests.sh @@ -1,4 +1,4 @@ -# !bin/bash +#!/bin/bash set -e diff --git a/ci-tests/riscof/sail_cSim/env/link.ld b/test/act_cross_check/riscof/sail_csim/env/link.ld similarity index 100% rename from ci-tests/riscof/sail_cSim/env/link.ld rename to test/act_cross_check/riscof/sail_csim/env/link.ld diff --git a/test/act_cross_check/riscof/sail_csim/env/model_test.h b/test/act_cross_check/riscof/sail_csim/env/model_test.h new file mode 100644 index 000000000..7c2d302eb --- /dev/null +++ b/test/act_cross_check/riscof/sail_csim/env/model_test.h @@ -0,0 +1,55 @@ +#ifndef _COMPLIANCE_MODEL_H +#define _COMPLIANCE_MODEL_H + +// clang-format off +#define RVMODEL_DATA_SECTION .pushsection \ + .tohost, "aw", @progbits; \ + .align 8; \ + .global tohost; \ + tohost: \ + .dword 0; \ + .align 8; \ + .global fromhost; \ + fromhost: \ + .dword 0; \ + .popsection; \ + .align 8; \ + .global begin_regstate; \ + begin_regstate: \ + .word 128; \ + .align 8; \ + .global end_regstate; \ + end_regstate: \ + .word 4; + +// clang-format on +#define RVMODEL_HALT \ + li x1, 1; \ + write_tohost: \ + sw x1, tohost, x3; \ + j write_tohost; + +#define RVMODEL_BOOT + +#define RVMODEL_DATA_BEGIN \ + RVMODEL_DATA_SECTION.align 4; \ + .global begin_signature; \ + begin_signature: + +#define RVMODEL_DATA_END \ + .align 4; \ + .global end_signature; \ + end_signature: + +#define RVMODEL_IO_INIT +#define RVMODEL_IO_WRITE_STR(_R, _STR) +#define RVMODEL_IO_CHECK() +#define RVMODEL_IO_ASSERT_GPR_EQ(_S, _R, _I) +#define RVMODEL_IO_ASSERT_SFPR_EQ(_F, _R, _I) +#define RVMODEL_IO_ASSERT_DFPR_EQ(_D, _R, _I) +#define RVMODEL_SET_MSW_INT +#define RVMODEL_CLEAR_MSW_INT +#define RVMODEL_CLEAR_MTIMER_INT +#define RVMODEL_CLEAR_MEXT_INT + +#endif diff --git a/ci-tests/riscof/sail_cSim/riscof_sail_cSim.py b/test/act_cross_check/riscof/sail_csim/riscof_sail_csim.py similarity index 50% rename from ci-tests/riscof/sail_cSim/riscof_sail_cSim.py rename to test/act_cross_check/riscof/sail_csim/riscof_sail_csim.py index 6a3b9aa51..4e6316353 100644 --- a/ci-tests/riscof/sail_cSim/riscof_sail_cSim.py +++ b/test/act_cross_check/riscof/sail_csim/riscof_sail_csim.py @@ -1,21 +1,11 @@ import os -import re -import shutil -import subprocess -import shlex -import logging -import random -import string -from string import Template import riscof.utils as utils from riscof.pluginTemplate import pluginTemplate import riscof.constants as constants from riscv_isac.isac import isac -logger = logging.getLogger() - -class sail_cSim(pluginTemplate): +class sail_csim(pluginTemplate): __model__ = "sail_c_simulator" __version__ = "0.5.0" @@ -24,7 +14,7 @@ def __init__(self, *args, **kwargs): config = kwargs.get('config') if config is None: - logger.error("Config node for sail_cSim missing.") + print("Please enter input file paths in configuration.") raise SystemExit(1) self.num_jobs = str(config['jobs'] if 'jobs' in config else 1) self.pluginpath = os.path.abspath(config['pluginpath']) @@ -33,9 +23,6 @@ def __init__(self, *args, **kwargs): self.isa_spec = os.path.abspath(config['ispec']) if 'ispec' in config else '' self.platform_spec = os.path.abspath(config['pspec']) if 'ispec' in config else '' self.make = config['make'] if 'make' in config else 'make' - logger.debug("SAIL CSim plugin initialised using the following configuration.") - for entry in config: - logger.debug(entry+' : '+config[entry]) return sclass def initialise(self, suite, work_dir, archtest_env): @@ -49,74 +36,18 @@ def initialise(self, suite, work_dir, archtest_env): -I '+self.pluginpath+'/env/\ -I ' + archtest_env - # workaround to avoid clang format error in sail-riscv CI. - # *clang suggest style that is syntactically incorrect* - # Insert the following macro at run-time. - modelTest_path = 'sail_cSim/env/model_test.h' - macro = """ -#define RVMODEL_DATA_SECTION .pushsection \\ - .tohost, "aw", @progbits; \\ - .align 8; \\ - .global tohost; \\ - tohost: \\ - .dword 0; \\ - .align 8; \\ - .global fromhost; \\ - fromhost: \\ - .dword 0; \\ - .popsection; \\ - .align 8; \\ - .global begin_regstate; \\ - begin_regstate: \\ - .word 128; \\ - .align 8; \\ - .global end_regstate; \\ - end_regstate: \\ - .word 4; -""" - with open(modelTest_path, 'r') as file: - modelTest = file.readlines() - modelTest.insert(2, macro) - with open(modelTest_path, 'w') as file: - file.writelines(modelTest) - def build(self, isa_yaml, platform_yaml): ispec = utils.load_yaml(isa_yaml)['hart0'] self.xlen = ('64' if 64 in ispec['supported_xlen'] else '32') self.isa = ' ' # 'rv' + self.xlen ilp32 = 'ilp32e ' if "E" in ispec["ISA"] else 'ilp32 ' self.compile_cmd = self.compile_cmd+' -mabi='+('lp64 ' if 64 in ispec['supported_xlen'] else ilp32) - # if "I" in ispec["ISA"]: - # self.isa += 'i' - # if "M" in ispec["ISA"]: - # self.isa += 'm' - # if "C" in ispec["ISA"]: - # self.isa += 'c' - # if "F" in ispec["ISA"]: - # self.isa += 'f' - # if "D" in ispec["ISA"]: - # self.isa += 'd' # flag for sail-riscv to enable zcb extension. # sail model does not yet offer flags for other extensions, supported extensions are enabled by default if "Zcb" in ispec["ISA"]: self.isa += ' --enable-zcb' - objdump = "riscv64-unknown-elf-objdump" - if shutil.which(objdump) is None: - logger.error(objdump+": executable not found. Please check environment setup.") - raise SystemExit(1) - compiler = "riscv64-unknown-elf-gcc" - if shutil.which(compiler) is None: - logger.error(compiler+": executable not found. Please check environment setup.") - raise SystemExit(1) - if shutil.which(self.sail_exe[self.xlen]) is None: - logger.error(self.sail_exe[self.xlen]+ ": executable not found. Please check environment setup.") - raise SystemExit(1) - if shutil.which(self.make) is None: - logger.error(self.make+": executable not found. Please check environment setup.") - raise SystemExit(1) - def runTests(self, testList, cgf_file=None): if os.path.exists(self.work_dir+ "/Makefile." + self.name[:-1]): os.remove(self.work_dir+ "/Makefile." + self.name[:-1]) diff --git a/ci-tests/riscof/spike/env/link.ld b/test/act_cross_check/riscof/spike/env/link.ld similarity index 100% rename from ci-tests/riscof/spike/env/link.ld rename to test/act_cross_check/riscof/spike/env/link.ld diff --git a/ci-tests/riscof/spike/env/model_test.h b/test/act_cross_check/riscof/spike/env/model_test.h similarity index 51% rename from ci-tests/riscof/spike/env/model_test.h rename to test/act_cross_check/riscof/spike/env/model_test.h index 79b2f44fe..c0f97ea6e 100644 --- a/ci-tests/riscof/spike/env/model_test.h +++ b/test/act_cross_check/riscof/spike/env/model_test.h @@ -1,6 +1,28 @@ #ifndef _COMPLIANCE_MODEL_H #define _COMPLIANCE_MODEL_H +// clang-format off +#define RVMODEL_DATA_SECTION .pushsection \ + .tohost, "aw", @progbits; \ + .align 8; \ + .global tohost; \ + tohost: \ + .dword 0; \ + .align 8; \ + .global fromhost; \ + fromhost: \ + .dword 0; \ + .popsection; \ + .align 8; \ + .global begin_regstate; \ + begin_regstate: \ + .word 128; \ + .align 8; \ + .global end_regstate; \ + end_regstate: \ + .word 4; + +// clang-format on #define RVMODEL_HALT \ li x1, 1; \ write_tohost: \ diff --git a/ci-tests/riscof/spike/riscof_spike.py b/test/act_cross_check/riscof/spike/riscof_spike.py similarity index 68% rename from ci-tests/riscof/spike/riscof_spike.py rename to test/act_cross_check/riscof/spike/riscof_spike.py index 89ea036d8..e49d9ccb1 100644 --- a/ci-tests/riscof/spike/riscof_spike.py +++ b/test/act_cross_check/riscof/spike/riscof_spike.py @@ -1,20 +1,9 @@ import os -import re -import shutil -import subprocess -import shlex -import logging -import random -import string -from string import Template -import sys import riscof.utils as utils import riscof.constants as constants from riscof.pluginTemplate import pluginTemplate -logger = logging.getLogger() - class spike(pluginTemplate): __model__ = "spike" @@ -55,37 +44,6 @@ def initialise(self, suite, work_dir, archtest_env): -I '+self.pluginpath+'/env/\ -I ' + archtest_env + ' {1} -o {2} {3}' - # workaround to avoid clang format error in sail-riscv CI. - # *clang suggest style that is syntactically incorrect* - # Insert the following macro at run-time. - modelTest_path = 'spike/env/model_test.h' - macro = """ -#define RVMODEL_DATA_SECTION .pushsection \\ - .tohost, "aw", @progbits; \\ - .align 8; \\ - .global tohost; \\ - tohost: \\ - .dword 0; \\ - .align 8; \\ - .global fromhost; \\ - fromhost: \\ - .dword 0; \\ - .popsection; \\ - .align 8; \\ - .global begin_regstate; \\ - begin_regstate: \\ - .word 128; \\ - .align 8; \\ - .global end_regstate; \\ - end_regstate: \\ - .word 4; -""" - with open(modelTest_path, 'r') as file: - modelTest = file.readlines() - modelTest.insert(2, macro) - with open(modelTest_path, 'w') as file: - file.writelines(modelTest) - def build(self, isa_yaml, platform_yaml): # load the isa yaml as a dictionary in python. diff --git a/ci-tests/riscof/spike/spike_isa32.yaml b/test/act_cross_check/riscof/spike/spike_isa32.yaml similarity index 100% rename from ci-tests/riscof/spike/spike_isa32.yaml rename to test/act_cross_check/riscof/spike/spike_isa32.yaml diff --git a/ci-tests/riscof/spike/spike_isa32e.yaml b/test/act_cross_check/riscof/spike/spike_isa32e.yaml similarity index 100% rename from ci-tests/riscof/spike/spike_isa32e.yaml rename to test/act_cross_check/riscof/spike/spike_isa32e.yaml diff --git a/ci-tests/riscof/spike/spike_isa64.yaml b/test/act_cross_check/riscof/spike/spike_isa64.yaml similarity index 100% rename from ci-tests/riscof/spike/spike_isa64.yaml rename to test/act_cross_check/riscof/spike/spike_isa64.yaml diff --git a/ci-tests/riscof/spike/spike_platform.yaml b/test/act_cross_check/riscof/spike/spike_platform.yaml similarity index 100% rename from ci-tests/riscof/spike/spike_platform.yaml rename to test/act_cross_check/riscof/spike/spike_platform.yaml