PIC16F1459config.c

/*==============================================================================
	UBMP 1.0 (PIC16F1459) configuration bit settings.

	Processor configuration bits determine processor operating characteristics
	as well as processor-specific features. Refer to the processor datasheet
	for details on specific configuration bit settings.

	MPLAB X contains a 'Configuration Bits' settings tool accessed under:
	Window menu -> PIC Memory Views. This tool generated the settings, below.
==============================================================================*/

// TODO - Verify or modify configuration bits using the Configuration Bits tool.

// PIC16F1459 Configuration Bit settings generated by MPLABX for UBMP version 1.
// These settings must be exactly the same as those for the bootloader program.

#include <xc.h>

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

// CONFIG1
#pragma config FOSC = INTOSC	// Oscillator Selection Bits (INTOSC oscillator: I/O function on CLKIN pin)
#pragma config WDTE = OFF		// Watchdog Timer Enable (WDT disabled)
#pragma config PWRTE = ON		// Power-up Timer Enable (PWRT enabled)
#pragma config MCLRE = OFF		// MCLR Pin Function Select (MCLR/VPP pin function is digital input)
#pragma config CP = OFF			// Flash Program Memory Code Protection (Program memory code protection is disabled)
#pragma config BOREN = OFF		// Brown-out Reset Enable (Brown-out Reset enabled)
#pragma config CLKOUTEN = OFF	// Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin)
#pragma config IESO = OFF		// Internal/External Switchover Mode (Internal/External Switchover Mode is disabled)
#pragma config FCMEN = OFF		// Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is disabled)

// CONFIG2
#pragma config WRT = OFF		// Flash Memory Self-Write Protection (Write protection off)
#pragma config CPUDIV = NOCLKDIV// CPU System Clock Selection Bit (NO CPU system divide)
#pragma config USBLSCLK = 48MHz	// USB Low SPeed Clock Selection bit (System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.)
#pragma config PLLMULT = 3x		// PLL Multipler Selection Bit (3x Output Frequency Selected)
#pragma config PLLEN = ENABLED	// PLL Enable Bit (3x or 4x PLL Enabled)
#pragma config STVREN = ON		// Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset)
#pragma config BORV = LO		// Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), low trip point selected.)
#pragma config LPBOR = OFF		// Low-Power Brown Out Reset (Low-Power BOR is disabled)
#pragma config LVP = OFF		// Low-Voltage Programming Enable (High-voltage on MCLR/VPP must be used for programming)