create_project.tcl

#*****************************************************************************************
# Vivado (TM) v2021.2 (64-bit)
#
# miriscv_testsoc.tcl: Tcl script for re-creating project 'miriscv_testsoc'
#
# Generated by Vivado on Mon Apr 17 11:48:10 +0300 2023
# IP Build 3369179 on Thu Oct 21 08:25:16 MDT 2021
#
# This file contains the Vivado Tcl commands for re-creating the project to the state*
# when this script was generated. In order to re-create the project, please source this
# file in the Vivado Tcl Shell.
#
# * Note that the runs in the created project will be configured the same way as the
#   original project, however they will not be launched automatically. To regenerate the
#   run results please launch the synthesis/implementation runs as needed.
#
#*****************************************************************************************
# NOTE: In order to use this script for source control purposes, please make sure that the
#       following files are added to the source control system:-
#
# 1. This project restoration tcl script (miriscv_testsoc.tcl) that was generated.
#
# 2. The following remote source files that were added to the original project:-
#
#    "rtl/include/miriscv_pkg.sv"
#    "rtl/include/miriscv_alu_pkg.sv"
#    "rtl/miriscv_alu.sv"
#    "rtl/include/miriscv_gpr_pkg.sv"
#    "rtl/miriscv_control_unit.sv"
#    "rtl/include/miriscv_decode_pkg.sv"
#    "rtl/include/miriscv_opcodes_pkg.sv"
#    "rtl/miriscv_decode_stage.sv"
#    "rtl/include/miriscv_mdu_pkg.sv"
#    "rtl/miriscv_decoder.sv"
#    "rtl/miriscv_div.sv"
#    "rtl/miriscv_execute_stage.sv"
#    "rtl/miriscv_fetch_stage.sv"
#    "rtl/miriscv_fetch_unit.sv"
#    "rtl/miriscv_gpr.sv"
#    "rtl/include/miriscv_lsu_pkg.sv"
#    "rtl/miriscv_mdu.sv"
#    "rtl/miriscv_memory_stage.sv"
#    "rtl/miriscv_signextend.sv"
#    "rtl/miriscv_core.sv"
#    "testsoc/apb_timer/apb_timer.sv"
#    "testsoc/miriscv_ram.sv"
#    "testsoc/miriscv_test_soc.sv"
#    "testsoc/apb_timer/timer.sv"
#    "testsoc/apb_uart/apb_uart.vhd"
#    "testsoc/apb_uart/slib_clock_div.vhd"
#    "testsoc/apb_uart/slib_counter.vhd"
#    "testsoc/apb_uart/slib_edge_detect.vhd"
#    "testsoc/apb_uart/slib_fifo.vhd"
#    "testsoc/apb_uart/slib_input_filter.vhd"
#    "testsoc/apb_uart/slib_input_sync.vhd"
#    "testsoc/apb_uart/slib_mv_filter.vhd"
#    "testsoc/apb_uart/uart_baudgen.vhd"
#    "testsoc/apb_uart/uart_interrupt.vhd"
#    "testsoc/apb_uart/uart_receiver.vhd"
#    "testsoc/apb_uart/uart_transmitter.vhd"
#    "sw/coremark_text.dat"
#    "sw/coremark_data.dat"
#    "xdc/miriscv_test_soc.xdc"
#    "tb/tb_miriscv_coremark.sv"
#
#*****************************************************************************************

# Check file required for this script exists
proc checkRequiredFiles { origin_dir} {
  set status true

  set files [list \
 "[file normalize "$origin_dir/rtl/include/miriscv_pkg.sv"]"\
 "[file normalize "$origin_dir/rtl/include/miriscv_alu_pkg.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_alu.sv"]"\
 "[file normalize "$origin_dir/rtl/include/miriscv_gpr_pkg.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_control_unit.sv"]"\
 "[file normalize "$origin_dir/rtl/include/miriscv_decode_pkg.sv"]"\
 "[file normalize "$origin_dir/rtl/include/miriscv_opcodes_pkg.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_decode_stage.sv"]"\
 "[file normalize "$origin_dir/rtl/include/miriscv_mdu_pkg.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_decoder.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_div.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_execute_stage.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_fetch_stage.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_fetch_unit.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_gpr.sv"]"\
 "[file normalize "$origin_dir/rtl/include/miriscv_lsu_pkg.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_mdu.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_lsu.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_memory_stage.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_signextend.sv"]"\
 "[file normalize "$origin_dir/rtl/miriscv_core.sv"]"\
 "[file normalize "$origin_dir/testsoc/apb_timer/apb_timer.sv"]"\
 "[file normalize "$origin_dir/testsoc/miriscv_ram.sv"]"\
 "[file normalize "$origin_dir/testsoc/miriscv_test_soc.sv"]"\
 "[file normalize "$origin_dir/testsoc/apb_timer/timer.sv"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/apb_uart.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/slib_clock_div.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/slib_counter.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/slib_edge_detect.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/slib_fifo.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/slib_input_filter.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/slib_input_sync.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/slib_mv_filter.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/uart_baudgen.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/uart_interrupt.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/uart_receiver.vhd"]"\
 "[file normalize "$origin_dir/testsoc/apb_uart/uart_transmitter.vhd"]"\
 "[file normalize "$origin_dir/sw/coremark_text.dat"]"\
 "[file normalize "$origin_dir/sw/coremark_data.dat"]"\
 "[file normalize "$origin_dir/xdc/miriscv_test_soc.xdc"]"\
 "[file normalize "$origin_dir/tb/tb_miriscv_coremark.sv"]"\
  ]
  foreach ifile $files {
    if { ![file isfile $ifile] } {
      puts " Could not find remote file $ifile "
      set status false
    }
  }

  return $status
}
# Set the reference directory for source file relative paths (by default the value is script directory path)
set origin_dir "."

# Use origin directory path location variable, if specified in the tcl shell
if { [info exists ::origin_dir_loc] } {
  set origin_dir $::origin_dir_loc
}

# Set the project name
set _xil_proj_name_ "miriscv_testsoc"

# Use project name variable, if specified in the tcl shell
if { [info exists ::user_project_name] } {
  set _xil_proj_name_ $::user_project_name
}

variable script_file
set script_file "create_project.tcl"

# Help information for this script
proc print_help {} {
  variable script_file
  puts "\nDescription:"
  puts "Recreate a Vivado project from this script. The created project will be"
  puts "functionally equivalent to the original project for which this script was"
  puts "generated. The script contains commands for creating a project, filesets,"
  puts "runs, adding/importing sources and setting properties on various objects.\n"
  puts "Syntax:"
  puts "$script_file"
  puts "$script_file -tclargs \[--origin_dir <path>\]"
  puts "$script_file -tclargs \[--project_name <name>\]"
  puts "$script_file -tclargs \[--help\]\n"
  puts "Usage:"
  puts "Name                   Description"
  puts "-------------------------------------------------------------------------"
  puts "\[--origin_dir <path>\]  Determine source file paths wrt this path. Default"
  puts "                       origin_dir path value is \".\", otherwise, the value"
  puts "                       that was set with the \"-paths_relative_to\" switch"
  puts "                       when this script was generated.\n"
  puts "\[--project_name <name>\] Create project with the specified name. Default"
  puts "                       name is the name of the project from where this"
  puts "                       script was generated.\n"
  puts "\[--help\]               Print help information for this script"
  puts "-------------------------------------------------------------------------\n"
  exit 0
}

if { $::argc > 0 } {
  for {set i 0} {$i < $::argc} {incr i} {
    set option [string trim [lindex $::argv $i]]
    switch -regexp -- $option {
      "--origin_dir"   { incr i; set origin_dir [lindex $::argv $i] }
      "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] }
      "--help"         { print_help }
      default {
        if { [regexp {^-} $option] } {
          puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n"
          return 1
        }
      }
    }
  }
}

# Set the directory path for the original project from where this script was exported
set orig_proj_dir "[file normalize "$origin_dir/tmp"]"

# Check for paths and files needed for project creation
set validate_required 0
if { $validate_required } {
  if { [checkRequiredFiles $origin_dir] } {
    puts "Tcl file $script_file is valid. All files required for project creation is accesable. "
  } else {
    puts "Tcl file $script_file is not valid. Not all files required for project creation is accesable. "
    return
  }
}

# Create project
create_project ${_xil_proj_name_} ./tmp/${_xil_proj_name_} -part xc7a100tcsg324-1

# Set the directory path for the new project
set proj_dir [get_property directory [current_project]]

# Set project properties
set obj [current_project]
set_property -name "default_lib" -value "xil_defaultlib" -objects $obj
set_property -name "enable_vhdl_2008" -value "1" -objects $obj
set_property -name "ip_cache_permissions" -value "read write" -objects $obj
set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj
set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj
set_property -name "part" -value "xc7a100tcsg324-1" -objects $obj
# set_property -name "revised_directory_structure" -value "1" -objects $obj
set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj
set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj
set_property -name "simulator_language" -value "Mixed" -objects $obj
set_property -name "webtalk.xsim_launch_sim" -value "53" -objects $obj

# Create 'sources_1' fileset (if not found)
if {[string equal [get_filesets -quiet sources_1] ""]} {
  create_fileset -srcset sources_1
}

# Set 'sources_1' fileset object
set obj [get_filesets sources_1]
set files [list \
 [file normalize "${origin_dir}/rtl/include/miriscv_pkg.sv"] \
 [file normalize "${origin_dir}/rtl/include/miriscv_alu_pkg.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_alu.sv"] \
 [file normalize "${origin_dir}/rtl/include/miriscv_gpr_pkg.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_control_unit.sv"] \
 [file normalize "${origin_dir}/rtl/include/miriscv_decode_pkg.sv"] \
 [file normalize "${origin_dir}/rtl/include/miriscv_opcodes_pkg.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_decode_stage.sv"] \
 [file normalize "${origin_dir}/rtl/include/miriscv_mdu_pkg.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_decoder.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_div.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_execute_stage.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_fetch_stage.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_fetch_unit.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_gpr.sv"] \
 [file normalize "${origin_dir}/rtl/include/miriscv_lsu_pkg.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_mdu.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_lsu.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_memory_stage.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_signextend.sv"] \
 [file normalize "${origin_dir}/rtl/miriscv_core.sv"] \
 [file normalize "${origin_dir}/testsoc/apb_timer/apb_timer.sv"] \
 [file normalize "${origin_dir}/testsoc/miriscv_ram.sv"] \
 [file normalize "${origin_dir}/testsoc/miriscv_test_soc.sv"] \
 [file normalize "${origin_dir}/testsoc/apb_timer/timer.sv"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/apb_uart.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/slib_clock_div.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/slib_counter.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/slib_edge_detect.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/slib_fifo.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/slib_input_filter.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/slib_input_sync.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/slib_mv_filter.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/uart_baudgen.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/uart_interrupt.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/uart_receiver.vhd"] \
 [file normalize "${origin_dir}/testsoc/apb_uart/uart_transmitter.vhd"] \
 [file normalize "${origin_dir}/sw/coremark_text.dat"] \
 [file normalize "${origin_dir}/sw/coremark_data.dat"] \
]
add_files -norecurse -fileset $obj $files

# Set 'sources_1' fileset file properties for remote files
set file "$origin_dir/rtl/include/miriscv_pkg.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/include/miriscv_alu_pkg.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_alu.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/include/miriscv_gpr_pkg.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_control_unit.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/include/miriscv_decode_pkg.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/include/miriscv_opcodes_pkg.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_decode_stage.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/include/miriscv_mdu_pkg.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/include/miriscv_lsu_pkg.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_decoder.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_div.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_execute_stage.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_fetch_stage.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_fetch_unit.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_gpr.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/include/miriscv_lsu_pkg.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_mdu.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_lsu.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_memory_stage.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_signextend.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/rtl/miriscv_core.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/testsoc/apb_timer/apb_timer.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/testsoc/miriscv_ram.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/testsoc/miriscv_test_soc.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/testsoc/apb_timer/timer.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/apb_uart.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/slib_clock_div.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/slib_counter.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/slib_edge_detect.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/slib_fifo.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/slib_input_filter.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/slib_input_sync.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/slib_mv_filter.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/uart_baudgen.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/uart_interrupt.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/uart_receiver.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/testsoc/apb_uart/uart_transmitter.vhd"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "VHDL" -objects $file_obj

set file "$origin_dir/sw/coremark_text.dat"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "Data Files" -objects $file_obj

set file "$origin_dir/sw/coremark_data.dat"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "file_type" -value "Data Files" -objects $file_obj


# Set 'sources_1' fileset file properties for local files
# None

# Set 'sources_1' fileset properties
set obj [get_filesets sources_1]
set_property -name "top" -value "miriscv_test_soc" -objects $obj
set_property -name "top_auto_set" -value "0" -objects $obj

# Create 'constrs_1' fileset (if not found)
if {[string equal [get_filesets -quiet constrs_1] ""]} {
  create_fileset -constrset constrs_1
}

# Set 'constrs_1' fileset object
set obj [get_filesets constrs_1]

# Add/Import constrs file and set constrs file properties
set file "[file normalize "$origin_dir/xdc/miriscv_test_soc.xdc"]"
set file_added [add_files -norecurse -fileset $obj [list $file]]
set file "$origin_dir/xdc/miriscv_test_soc.xdc"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]]
set_property -name "file_type" -value "XDC" -objects $file_obj

# Set 'constrs_1' fileset properties
set obj [get_filesets constrs_1]
set_property -name "target_part" -value "xc7a100tcsg324-1" -objects $obj

# Create 'sim_1' fileset (if not found)
if {[string equal [get_filesets -quiet sim_1] ""]} {
  create_fileset -simset sim_1
}

# Set 'sim_1' fileset object
set obj [get_filesets sim_1]
set files [list \
 [file normalize "${origin_dir}/tb/tb_miriscv_coremark.sv"] \
]
add_files -norecurse -fileset $obj $files

# Set 'sim_1' fileset file properties for remote files
set file "$origin_dir/tb/tb_miriscv_coremark.sv"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sim_1] [list "*$file"]]
set_property -name "file_type" -value "SystemVerilog" -objects $file_obj


# Set 'sim_1' fileset file properties for local files
# None

# Set 'sim_1' fileset properties
set obj [get_filesets sim_1]
set_property -name "nl.mode" -value "funcsim" -objects $obj
set_property -name "sim_mode" -value "post-synthesis" -objects $obj
set_property -name "top" -value "tb_miriscv_coremark" -objects $obj
set_property -name "top_lib" -value "xil_defaultlib" -objects $obj

# Set 'utils_1' fileset object
set obj [get_filesets utils_1]
# Empty (no sources present)

# Set 'utils_1' fileset properties
set obj [get_filesets utils_1]

set idrFlowPropertiesConstraints ""
catch {
 set idrFlowPropertiesConstraints [get_param runs.disableIDRFlowPropertyConstraints]
 set_param runs.disableIDRFlowPropertyConstraints 1
}

puts "INFO: Project created:${_xil_proj_name_}"