From 9a256226481704ab0cf692a00d892070eca53176 Mon Sep 17 00:00:00 2001
From: Huaqi Fang <578567190@qq.com>
Date: Sat, 29 Jun 2024 09:51:53 +0800
Subject: [PATCH] SoC/evalsoc: update iar ddr icf ram/rom from 256M to 128M

Signed-off-by: Huaqi Fang <578567190@qq.com>
---
 .../Board/nuclei_fpga_eval/Source/IAR/iar_evalsoc_ddr.icf     | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/SoC/evalsoc/Board/nuclei_fpga_eval/Source/IAR/iar_evalsoc_ddr.icf b/SoC/evalsoc/Board/nuclei_fpga_eval/Source/IAR/iar_evalsoc_ddr.icf
index 093dbc21..58a4e2f0 100644
--- a/SoC/evalsoc/Board/nuclei_fpga_eval/Source/IAR/iar_evalsoc_ddr.icf
+++ b/SoC/evalsoc/Board/nuclei_fpga_eval/Source/IAR/iar_evalsoc_ddr.icf
@@ -10,8 +10,8 @@ define memory mem with size = 4G;
 
 /* Set memory region information according to your device */
 /* For this case, ROM and RAM are both DDR region */
-define region ROM_region32 = mem:[from 0xA0000000 size 0x10000000];
-define region RAM_region32 = mem:[from 0xB0000000 size 0x10000000];
+define region ROM_region32 = mem:[from 0xA0000000 size 0x08000000];
+define region RAM_region32 = mem:[from 0xA8000000 size 0x08000000];
 
 initialize by copy { rw };
 do not initialize  { section *.noinit };