From 11c7653883b13cd426c03b2aae96dad54476b92c Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Sun, 19 Mar 2023 16:30:41 +0100
Subject: [PATCH 01/17] sys/riotboot: fix compilation error of riotboot_slot

`riotboot_slot` uses `ARRAY_SIZE` which is defined in `container.h` but not yet included on some plattforms.
---
 sys/riotboot/slot.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sys/riotboot/slot.c b/sys/riotboot/slot.c
index 769028e61fb12..ce1cb066fd3fa 100644
--- a/sys/riotboot/slot.c
+++ b/sys/riotboot/slot.c
@@ -24,7 +24,9 @@
 #include <assert.h>
 #include <string.h>
 #include <inttypes.h>
+#include <stdio.h>
 
+#include "container.h"
 #include "cpu.h"
 #include "riotboot/slot.h"
 #include "riotboot/hdr.h"

From b06a71a76a391b43e5ebecac0ab8bb3f5e808cdd Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Sun, 19 Mar 2023 16:34:32 +0100
Subject: [PATCH 02/17] cpu/riscv_common: rename cpu.h to cpu_common.h

To allow CPU specific definitions in `cpu.h`, `riscv_common/cpu.h` is renamed to ``riscv_common/cpu_common.h` and included in new `cpu.h` files for FE310 and GD32V.
---
 cpu/fe310/include/cpu.h                       | 31 ++++++++++++++++++
 cpu/gd32v/include/cpu.h                       | 32 +++++++++++++++++++
 .../include/{cpu.h => cpu_common.h}           |  6 ++--
 3 files changed, 66 insertions(+), 3 deletions(-)
 create mode 100644 cpu/fe310/include/cpu.h
 create mode 100644 cpu/gd32v/include/cpu.h
 rename cpu/riscv_common/include/{cpu.h => cpu_common.h} (96%)

diff --git a/cpu/fe310/include/cpu.h b/cpu/fe310/include/cpu.h
new file mode 100644
index 0000000000000..6b2f2464dc1d5
--- /dev/null
+++ b/cpu/fe310/include/cpu.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2023 Gunar Schorcht
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     cpu_fe310
+ * @{
+ *
+ * @file
+ * @brief       CPU specific definitions
+ */
+
+#ifndef CPU_H
+#define CPU_H
+
+#include "cpu_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CPU_H */
+/** @} */
diff --git a/cpu/gd32v/include/cpu.h b/cpu/gd32v/include/cpu.h
new file mode 100644
index 0000000000000..fabcae5c55ca0
--- /dev/null
+++ b/cpu/gd32v/include/cpu.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2023 Gunar Schorcht
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     cpu_gd32v
+ * @{
+ *
+ * @file
+ * @brief       CPU specific definitions
+ */
+
+#ifndef CPU_H
+#define CPU_H
+
+#include "cpu_conf.h"
+#include "cpu_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CPU_H */
+/** @} */
diff --git a/cpu/riscv_common/include/cpu.h b/cpu/riscv_common/include/cpu_common.h
similarity index 96%
rename from cpu/riscv_common/include/cpu.h
rename to cpu/riscv_common/include/cpu_common.h
index 25ce04b66c6f3..8329b71748cfe 100644
--- a/cpu/riscv_common/include/cpu.h
+++ b/cpu/riscv_common/include/cpu_common.h
@@ -22,8 +22,8 @@
 
 #include "irq_arch.h"
 
-#ifndef CPU_H
-#define CPU_H
+#ifndef CPU_COMMON_H
+#define CPU_COMMON_H
 
 #ifdef __cplusplus
 extern "C" {
@@ -85,5 +85,5 @@ void cpu_reg_disable_bits(volatile uint32_t *reg, uint32_t mask)
 }
 #endif
 
-#endif /* CPU_H */
+#endif /* CPU_COMMON_H */
 /** @} */

From c0abaab53d91bbc4aea5f00ad73dd9a601c4dee2 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Sun, 19 Mar 2023 16:37:56 +0100
Subject: [PATCH 03/17] cpu/riscv_common: add riotboot linker support

---
 cpu/riscv_common/Makefile.include   | 4 ++++
 cpu/riscv_common/ldscripts/riscv.ld | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/cpu/riscv_common/Makefile.include b/cpu/riscv_common/Makefile.include
index d21f1baef6555..632fd461250c8 100644
--- a/cpu/riscv_common/Makefile.include
+++ b/cpu/riscv_common/Makefile.include
@@ -14,6 +14,10 @@ ifneq (,$(ROM_START_ADDR)$(RAM_START_ADDR)$(ROM_LEN)$(RAM_LEN))
   LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_start_addr=$(RAM_START_ADDR)
   LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_length=$(ROM_LEN)
   LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_length=$(RAM_LEN)
+  LINKFLAGS += $(if $(ROM_OFFSET),$(LINKFLAGPREFIX)--defsym=_rom_offset=$(ROM_OFFSET) \
+                                 ,$(LINKFLAGPREFIX)--defsym=_rom_offset=0x0)
+  LINKFLAGS += $(if $(FW_ROM_LEN),$(LINKFLAGPREFIX)--defsym=_fw_rom_length=$(FW_ROM_LEN) \
+                                 ,$(LINKFLAGPREFIX)--defsym=_fw_rom_length=$(ROM_LEN))
 endif
 
 ifneq (,$(ITIM_START_ADDR))
diff --git a/cpu/riscv_common/ldscripts/riscv.ld b/cpu/riscv_common/ldscripts/riscv.ld
index 72f9731c7e1a7..8c9d78a9c4de8 100644
--- a/cpu/riscv_common/ldscripts/riscv.ld
+++ b/cpu/riscv_common/ldscripts/riscv.ld
@@ -22,7 +22,7 @@ INCLUDE riscv_vars.ld
 
 MEMORY
 {
-  flash (rxai!w) : ORIGIN = _rom_start_addr, LENGTH = _rom_length
+  flash (rxai!w) : ORIGIN = _rom_start_addr + _rom_offset, LENGTH = _fw_rom_length
   ram   (wxa!ri) : ORIGIN = _ram_start_addr, LENGTH = _ram_length
   itim  (wxa!ri) : ORIGIN = _itim_start_addr, LENGTH = _itim_length
 }

From 989d04db5eb3746be03279f34f5986a82d39dc62 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Sun, 19 Mar 2023 16:38:51 +0100
Subject: [PATCH 04/17] cpu/gd32v: add riotboot support

---
 cpu/gd32v/Makefile.include | 35 ++++++++++++++++++++++++++++++++---
 cpu/gd32v/include/cpu.h    | 17 +++++++++++++++++
 2 files changed, 49 insertions(+), 3 deletions(-)

diff --git a/cpu/gd32v/Makefile.include b/cpu/gd32v/Makefile.include
index a2f2252e24d57..e4431c2e15a47 100644
--- a/cpu/gd32v/Makefile.include
+++ b/cpu/gd32v/Makefile.include
@@ -1,8 +1,37 @@
 RAM_START_ADDR ?= 0x20000000
-RAM_LEN ?= 32K
-
 ROM_START_ADDR ?= 0x08000000
-ROM_LEN ?= 128K
+
+ifneq (,$(filter gd32vf103%bt6 gd32vf103%bu6,$(CPU_MODEL)))
+  RAM_LEN ?= 32K
+  ROM_LEN ?= 128K
+else ifneq (,$(filter gd32vf103%8t6 gd32vf103%8u6,$(CPU_MODEL)))
+  RAM_LEN ?= 20K
+  ROM_LEN ?= 64K
+else ifneq (,$(filter gd32vf103%6t6 gd32vf103%6u6,$(CPU_MODEL)))
+  RAM_LEN ?= 10K
+  ROM_LEN ?= 32K
+else ifneq (,$(filter gd32vf103%4t6 gd32vf103%4u6,$(CPU_MODEL)))
+  RAM_LEN ?= 6K
+  ROM_LEN ?= 16K
+else
+  $(error CPU model $(CPU_MODEL) not supported)
+endif
+
+FW_ROM_LEN ?= $(shell printf "0x%x" $$(($(ROM_LEN:%K=%*1024))))
+
+RIOTBOOT_HDR_LEN ?= 0x400
+ifneq (,$(filter usbus_dfu tinyusb_dfu,$(USEMODULE)))
+  RIOTBOOT_LEN ?= 0x4000
+else
+  RIOTBOOT_LEN ?= 0x1000
+endif
+
+NUM_SLOTS ?= 2
+
+SLOT0_LEN ?= $(shell printf "0x%x" $$((($(ROM_LEN:%K=%*1024)-$(RIOTBOOT_LEN)) / $(NUM_SLOTS))))
+SLOT1_LEN ?= $(SLOT0_LEN)
+SLOT0_LEN := $(SLOT0_LEN)
+SLOT1_LEN := $(SLOT1_LEN)
 
 LINKER_SCRIPT ?= riscv.ld
 
diff --git a/cpu/gd32v/include/cpu.h b/cpu/gd32v/include/cpu.h
index fabcae5c55ca0..313cb481af49e 100644
--- a/cpu/gd32v/include/cpu.h
+++ b/cpu/gd32v/include/cpu.h
@@ -24,6 +24,23 @@
 extern "C" {
 #endif
 
+/**
+ * @brief   Returns the address of running application in flash
+ */
+static inline uint32_t cpu_get_image_baseaddr(void)
+{
+    extern uint8_t _start;
+    return (uint32_t)&_start;
+}
+
+/**
+ * @brief   Starts another image in flash
+ */
+static inline void cpu_jump_to_image(uint32_t addr)
+{
+    __asm__ volatile ("jr %0" :: "r" (addr));
+}
+
 #ifdef __cplusplus
 }
 #endif

From ff34b11b2b5085c13b78f0a401256fd8bfe2b5de Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Sun, 19 Mar 2023 16:40:50 +0100
Subject: [PATCH 05/17] boards/common/gd32v: enable riotboot feature

---
 boards/common/gd32v/Makefile.features | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/boards/common/gd32v/Makefile.features b/boards/common/gd32v/Makefile.features
index 3a51e118f3c3c..3419a21d04cff 100644
--- a/boards/common/gd32v/Makefile.features
+++ b/boards/common/gd32v/Makefile.features
@@ -1 +1,3 @@
 CPU = gd32v
+
+FEATURES_PROVIDED += riotboot

From 3c2c32405b4c67feb8e6ed9d42b8f169dfb7624d Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Mon, 20 Mar 2023 12:04:17 +0100
Subject: [PATCH 06/17] cpu/gd32c: cleanup in clock configuration

---
 cpu/gd32v/clock.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/cpu/gd32v/clock.c b/cpu/gd32v/clock.c
index c640138760eaa..a51d04f443ba6 100644
--- a/cpu/gd32v/clock.c
+++ b/cpu/gd32v/clock.c
@@ -41,6 +41,10 @@
 #define RCU_CFG0_SCS_HXTAL   (1 << RCU_CFG0_SCS_Pos)
 #define RCU_CFG0_SCS_PLL     (2 << RCU_CFG0_SCS_Pos)
 
+#define RCU_CFG0_SCSS_IRC8   (0 << RCU_CFG0_SCSS_Pos)
+#define RCU_CFG0_SCSS_HXTAL  (1 << RCU_CFG0_SCSS_Pos)
+#define RCU_CFG0_SCSS_PLL    (2 << RCU_CFG0_SCSS_Pos)
+
 #define ENABLE_DEBUG 0
 #include "debug.h"
 
@@ -115,8 +119,7 @@ void gd32vf103_clock_init(void)
      * configure the AHB and APB clock dividers as configure by the board */
     RCU->CFG0 = (RCU_CFG0_SCS_IRC8 | CLOCK_AHB_DIV_CONF |
                  CLOCK_APB1_DIV_CONF | CLOCK_APB2_DIV_CONF);
-    while ((RCU->CFG0 & RCU_CFG0_SCSS_Msk) !=
-           (RCU_CFG0_SCS_IRC8 << RCU_CFG0_SCSS_Pos)) {}
+    while ((RCU->CFG0 & RCU_CFG0_SCSS_Msk) != RCU_CFG0_SCSS_IRC8) {}
 
     /* disable all active clocks except IRC8 -> resets the clk configuration */
     RCU->CTL &= (RCU_CTL_IRC8MCALIB_Msk | RCU_CTL_IRC8MADJ_Msk);
@@ -147,8 +150,7 @@ void gd32vf103_clock_init(void)
 
     RCU->AHBEN &= ~RCU_AHBEN_FMCSPEN_Msk;
 
-    while ((RCU->CFG0 & RCU_CFG0_SCSS_Msk) !=
-           (RCU_CFG0_SCS_PLL << RCU_CFG0_SCSS_Pos)) {}
+    while ((RCU->CFG0 & RCU_CFG0_SCSS_Msk) != RCU_CFG0_SCSS_PLL) {}
 
     if (IS_ACTIVE(CONFIG_BOARD_HAS_HXTAL)) {
         /* disable IRCM8 clock if HXTAL is used */

From b899a087bf9f7e358e6e323296525d5c8e0eaee9 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Mon, 20 Mar 2023 12:07:57 +0100
Subject: [PATCH 07/17] cpu/gd32v: allow reconfig PLL multiplier in clock
 config

To be able to reconfigure the PLL multiplier in clock configuration, the existing value has to be reset first. This becomes necessary when changing the core clock, e.g. when booting with riotboot an application that uses USB.
---
 cpu/gd32v/clock.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/cpu/gd32v/clock.c b/cpu/gd32v/clock.c
index a51d04f443ba6..a87d493df86ea 100644
--- a/cpu/gd32v/clock.c
+++ b/cpu/gd32v/clock.c
@@ -125,6 +125,9 @@ void gd32vf103_clock_init(void)
     RCU->CTL &= (RCU_CTL_IRC8MCALIB_Msk | RCU_CTL_IRC8MADJ_Msk);
     RCU->CTL |= RCU_CTL_IRC8MEN_Msk;
 
+    /* reset PLL multiplier, required when configured before, e.g. in riotboot */
+    RCU->CFG0 &= ~(RCU_CFG0_PLLMF_3_0_Msk | RCU_CFG0_PLLMF_4_Msk);
+
     if (IS_ACTIVE(CONFIG_BOARD_HAS_HXTAL)) {
         /* if the board has an HXTAL, HXTAL is used as PLL input and PREDEV0 is set */
         cpu_reg_enable_bits(&RCU->CTL, RCU_CTL_HXTALEN_Msk);

From a1b75aeb0ebfc2772cbbbdb1e8e0c0ad11149a62 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Mon, 20 Mar 2023 12:32:33 +0100
Subject: [PATCH 08/17] sys/riotboot: common default NUM_SLOT, SLOT_* config

---
 cpu/cortexm_common/Makefile.include | 7 -------
 cpu/gd32v/Makefile.include          | 7 -------
 sys/riotboot/Makefile.include       | 9 +++++++++
 3 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/cpu/cortexm_common/Makefile.include b/cpu/cortexm_common/Makefile.include
index 04789eaf5c116..f71998927202b 100644
--- a/cpu/cortexm_common/Makefile.include
+++ b/cpu/cortexm_common/Makefile.include
@@ -76,13 +76,6 @@ ifneq (,$(filter usbus_dfu tinyusb_dfu,$(USEMODULE)))
 else
   RIOTBOOT_LEN ?= 0x1000
 endif
-# Currently 2 slots are supported by default, equals in length
-NUM_SLOTS ?= 2
-# Take the whole flash minus RIOTBOOT_LEN and divide it by NUM_SLOTS
-SLOT0_LEN ?= $(shell printf "0x%x" $$((($(ROM_LEN:%K=%*1024)-$(RIOTBOOT_LEN)) / $(NUM_SLOTS))))
-SLOT1_LEN ?= $(SLOT0_LEN)
-SLOT0_LEN := $(SLOT0_LEN)
-SLOT1_LEN := $(SLOT1_LEN)
 
 # JLink is able to flash any ARM CPUs
 PROGRAMMERS_SUPPORTED += jlink
diff --git a/cpu/gd32v/Makefile.include b/cpu/gd32v/Makefile.include
index e4431c2e15a47..97dead6fab06d 100644
--- a/cpu/gd32v/Makefile.include
+++ b/cpu/gd32v/Makefile.include
@@ -26,13 +26,6 @@ else
   RIOTBOOT_LEN ?= 0x1000
 endif
 
-NUM_SLOTS ?= 2
-
-SLOT0_LEN ?= $(shell printf "0x%x" $$((($(ROM_LEN:%K=%*1024)-$(RIOTBOOT_LEN)) / $(NUM_SLOTS))))
-SLOT1_LEN ?= $(SLOT0_LEN)
-SLOT0_LEN := $(SLOT0_LEN)
-SLOT1_LEN := $(SLOT1_LEN)
-
 LINKER_SCRIPT ?= riscv.ld
 
 CFLAGS += -DCPU_MODEL_$(call uppercase_and_underscore,$(CPU_MODEL))
diff --git a/sys/riotboot/Makefile.include b/sys/riotboot/Makefile.include
index 56e5aa99525bb..c9bb330e4522a 100644
--- a/sys/riotboot/Makefile.include
+++ b/sys/riotboot/Makefile.include
@@ -5,6 +5,15 @@
 # aligned according to CPU_IRQ_NUMOF (ref: cpu/cortexm_common/Makefile.include)
 RIOTBOOT_HDR_LEN ?= 0x100
 
+# Currently 2 slots are supported by default, equals in length
+NUM_SLOTS ?= 2
+
+# Take the whole flash minus RIOTBOOT_LEN and divide it by NUM_SLOTS
+SLOT0_LEN ?= $(shell printf "0x%x" $$((($(ROM_LEN:%K=%*1024)-$(RIOTBOOT_LEN)) / $(NUM_SLOTS))))
+SLOT1_LEN ?= $(SLOT0_LEN)
+SLOT0_LEN := $(SLOT0_LEN)
+SLOT1_LEN := $(SLOT1_LEN)
+
 # By default, slot 0 is found just after RIOTBOOT_LEN. Slot 1 after
 # slot 0. The values might be overridden to add more or less offset
 # if needed.

From 53db2ba2847e3b76007433556431af0c64701413 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Mon, 20 Mar 2023 13:37:56 +0100
Subject: [PATCH 09/17] sys/riotboot: uses SLOT1_OFFSET in hex format

Using hex number for addresses and address offsets improves the readability.
---
 sys/riotboot/Makefile.include | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sys/riotboot/Makefile.include b/sys/riotboot/Makefile.include
index c9bb330e4522a..b81e69716be48 100644
--- a/sys/riotboot/Makefile.include
+++ b/sys/riotboot/Makefile.include
@@ -18,7 +18,7 @@ SLOT1_LEN := $(SLOT1_LEN)
 # slot 0. The values might be overridden to add more or less offset
 # if needed.
 SLOT0_OFFSET ?= $(RIOTBOOT_LEN)
-SLOT1_OFFSET ?= $(shell echo $$(($(SLOT0_OFFSET) + $(SLOT0_LEN))))
+SLOT1_OFFSET ?= $(shell printf "0x%x" $$(($(SLOT0_OFFSET) + $(SLOT0_LEN))))
 
 CFLAGS += -DSLOT0_LEN=$(SLOT0_LEN)
 CFLAGS += -DSLOT0_OFFSET=$(SLOT0_OFFSET)

From c4881cc1488ddb3b9d8026938826e3a30d8b80ed Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Tue, 4 Apr 2023 12:53:17 +0200
Subject: [PATCH 10/17] pkg/esp32_sdk: patches for compilation with gcc 12.2

---
 ...terrupt-type-to-riscv-interrupt-type.patch |  25 ++++
 ...lude-stddef.h-for-size_t-deklaration.patch |  24 +++
 ...sp32s3-fix-return-types-in-functions.patch | 141 ++++++++++++++++++
 3 files changed, 190 insertions(+)
 create mode 100644 pkg/esp32_sdk/patches/0028-hal-cast-esp-interrupt-type-to-riscv-interrupt-type.patch
 create mode 100644 pkg/esp32_sdk/patches/0029-nfs_flash-include-stddef.h-for-size_t-deklaration.patch
 create mode 100644 pkg/esp32_sdk/patches/0030-bt-controller-esp32s3-fix-return-types-in-functions.patch

diff --git a/pkg/esp32_sdk/patches/0028-hal-cast-esp-interrupt-type-to-riscv-interrupt-type.patch b/pkg/esp32_sdk/patches/0028-hal-cast-esp-interrupt-type-to-riscv-interrupt-type.patch
new file mode 100644
index 0000000000000..d588f1057fa23
--- /dev/null
+++ b/pkg/esp32_sdk/patches/0028-hal-cast-esp-interrupt-type-to-riscv-interrupt-type.patch
@@ -0,0 +1,25 @@
+From 19f7ed9aaab8be94571779fc8b738d3479e0aa23 Mon Sep 17 00:00:00 2001
+From: Gunar Schorcht <gunar@schorcht.net>
+Date: Tue, 4 Apr 2023 09:55:00 +0200
+Subject: [PATCH 28/29] hal: cast esp interrupt type to riscv interrupt type
+
+---
+ components/hal/esp32c3/include/hal/interrupt_controller_ll.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/components/hal/esp32c3/include/hal/interrupt_controller_ll.h b/components/hal/esp32c3/include/hal/interrupt_controller_ll.h
+index 70afe314cfe..3c3ef3b953e 100644
+--- a/components/hal/esp32c3/include/hal/interrupt_controller_ll.h
++++ b/components/hal/esp32c3/include/hal/interrupt_controller_ll.h
+@@ -124,7 +124,7 @@ static inline void intr_cntrl_ll_set_int_level(int intr, int level)
+  */
+ static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type)
+ {
+-    esprv_intc_int_set_type(BIT(intr), type);
++    esprv_intc_int_set_type(BIT(intr), (enum intr_type)type);
+ }
+ 
+ #ifdef __cplusplus
+-- 
+2.34.1
+
diff --git a/pkg/esp32_sdk/patches/0029-nfs_flash-include-stddef.h-for-size_t-deklaration.patch b/pkg/esp32_sdk/patches/0029-nfs_flash-include-stddef.h-for-size_t-deklaration.patch
new file mode 100644
index 0000000000000..2a8ecc0521916
--- /dev/null
+++ b/pkg/esp32_sdk/patches/0029-nfs_flash-include-stddef.h-for-size_t-deklaration.patch
@@ -0,0 +1,24 @@
+From 0e52f50f9c53eac78f5c70aed1f140b8ba3a3031 Mon Sep 17 00:00:00 2001
+From: Gunar Schorcht <gunar@schorcht.net>
+Date: Tue, 4 Apr 2023 09:55:45 +0200
+Subject: [PATCH 29/29] nfs_flash: include stddef.h for size_t deklaration
+
+---
+ components/nvs_flash/src/intrusive_list.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/components/nvs_flash/src/intrusive_list.h b/components/nvs_flash/src/intrusive_list.h
+index bb580502ec7..695020c415f 100644
+--- a/components/nvs_flash/src/intrusive_list.h
++++ b/components/nvs_flash/src/intrusive_list.h
+@@ -14,6 +14,7 @@
+ #ifndef intrusive_list_h
+ #define intrusive_list_h
+ 
++#include <stddef.h>
+ #include <cassert>
+ #include <unordered_map>
+ 
+-- 
+2.34.1
+
diff --git a/pkg/esp32_sdk/patches/0030-bt-controller-esp32s3-fix-return-types-in-functions.patch b/pkg/esp32_sdk/patches/0030-bt-controller-esp32s3-fix-return-types-in-functions.patch
new file mode 100644
index 0000000000000..cde309f996ecb
--- /dev/null
+++ b/pkg/esp32_sdk/patches/0030-bt-controller-esp32s3-fix-return-types-in-functions.patch
@@ -0,0 +1,141 @@
+From e175ea4902cebfdd5b4edc470feff2dadbec408a Mon Sep 17 00:00:00 2001
+From: Gunar Schorcht <gunar@schorcht.net>
+Date: Wed, 5 Apr 2023 01:17:12 +0200
+Subject: [PATCH 30/30] bt/controller/esp32s3: fix return types in functions
+
+Since the size of int and int32_t is the same, changing int to int32_t and vise versa to fix the compilation issue due to function declaration conflict isn't any risk.
+---
+ components/bt/controller/esp32s3/bt.c | 52 +++++++++++++--------------
+ 1 file changed, 26 insertions(+), 26 deletions(-)
+
+diff --git a/components/bt/controller/esp32s3/bt.c b/components/bt/controller/esp32s3/bt.c
+index 64e10ad4a70..ee68c6b834b 100644
+--- a/components/bt/controller/esp32s3/bt.c
++++ b/components/bt/controller/esp32s3/bt.c
+@@ -268,7 +268,7 @@ extern char _bt_tmp_bss_end;
+  */
+ static void interrupt_set_wrapper(int32_t cpu_no, int32_t intr_source, int32_t intr_num, int32_t intr_prio);
+ static void interrupt_clear_wrapper(int32_t intr_source, int32_t intr_num);
+-static void interrupt_handler_set_wrapper(int n, void *fn, void *arg);
++static void interrupt_handler_set_wrapper(int32_t n, void *fn, void *arg);
+ static void IRAM_ATTR interrupt_disable(void);
+ static void IRAM_ATTR interrupt_restore(void);
+ static void IRAM_ATTR task_yield_from_isr(void);
+@@ -486,28 +486,28 @@ static void semphr_delete_wrapper(void *semphr)
+     vSemaphoreDelete(semphr);
+ }
+ 
+-static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
++static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
+ {
+-    return (int)xSemaphoreTakeFromISR(semphr, hptw);
++    return xSemaphoreTakeFromISR(semphr, hptw);
+ }
+ 
+-static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
++static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
+ {
+-    return (int)xSemaphoreGiveFromISR(semphr, hptw);
++    return xSemaphoreGiveFromISR(semphr, hptw);
+ }
+ 
+-static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
++static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
+ {
+     if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
+-        return (int)xSemaphoreTake(semphr, portMAX_DELAY);
++        return xSemaphoreTake(semphr, portMAX_DELAY);
+     } else {
+-        return (int)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
++        return xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
+     }
+ }
+ 
+-static int semphr_give_wrapper(void *semphr)
++static int32_t semphr_give_wrapper(void *semphr)
+ {
+-    return (int)xSemaphoreGive(semphr);
++    return xSemaphoreGive(semphr);
+ }
+ 
+ static void *mutex_create_wrapper(void)
+@@ -520,14 +520,14 @@ static void mutex_delete_wrapper(void *mutex)
+     vSemaphoreDelete(mutex);
+ }
+ 
+-static int mutex_lock_wrapper(void *mutex)
++static int32_t mutex_lock_wrapper(void *mutex)
+ {
+-    return (int)xSemaphoreTake(mutex, portMAX_DELAY);
++    return xSemaphoreTake(mutex, portMAX_DELAY);
+ }
+ 
+-static int mutex_unlock_wrapper(void *mutex)
++static int32_t mutex_unlock_wrapper(void *mutex)
+ {
+-    return (int)xSemaphoreGive(mutex);
++    return xSemaphoreGive(mutex);
+ }
+ 
+ static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
+@@ -540,37 +540,37 @@ static void queue_delete_wrapper(void *queue)
+     vQueueDelete(queue);
+ }
+ 
+-static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
++static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
+ {
+     if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
+-        return (int)xQueueSend(queue, item, portMAX_DELAY);
++        return xQueueSend(queue, item, portMAX_DELAY);
+     } else {
+-        return (int)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
++        return xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
+     }
+ }
+ 
+-static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
++static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
+ {
+     return (int)xQueueSendFromISR(queue, item, hptw);
+ }
+ 
+-static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
++static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
+ {
+     if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
+-        return (int)xQueueReceive(queue, item, portMAX_DELAY);
++        return xQueueReceive(queue, item, portMAX_DELAY);
+     } else {
+-        return (int)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
++        return xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
+     }
+ }
+ 
+-static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
++static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
+ {
+-    return (int)xQueueReceiveFromISR(queue, item, hptw);
++    return xQueueReceiveFromISR(queue, item, hptw);
+ }
+ 
+-static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
++static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
+ {
+-    return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
++    return xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
+ }
+ 
+ static void task_delete_wrapper(void *task_handle)
+@@ -592,7 +592,7 @@ static void *malloc_internal_wrapper(size_t size)
+     return p;
+ }
+ 
+-static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
++static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
+ {
+     int ret = esp_read_mac(mac, ESP_MAC_BT);
+     ESP_LOGI(BT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+-- 
+2.34.1
+

From 3d1f3fea46eb3447d3138b53597a7afbdbefc143 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Tue, 4 Apr 2023 13:21:22 +0200
Subject: [PATCH 11/17] cpu/esp_common: fix compilation issues gcc 12.2

---
 cpu/esp_common/esp-now/esp_now_netdev.c   | 10 ++++-----
 cpu/esp_common/esp-wifi/esp_wifi_netdev.c | 26 +++++++++++------------
 cpu/esp_common/esp-xtensa/irq_arch.c      |  7 +++---
 cpu/esp_common/esp-xtensa/thread_arch.c   |  4 ++--
 cpu/esp_common/freertos/ringbuf.c         |  1 +
 5 files changed, 25 insertions(+), 23 deletions(-)

diff --git a/cpu/esp_common/esp-now/esp_now_netdev.c b/cpu/esp_common/esp-now/esp_now_netdev.c
index 97b44f44b16df..428881953a0af 100644
--- a/cpu/esp_common/esp-now/esp_now_netdev.c
+++ b/cpu/esp_common/esp-now/esp_now_netdev.c
@@ -79,7 +79,7 @@ static bool _esp_now_add_peer(const uint8_t* bssid, uint8_t channel, const uint8
 
     memcpy(peer.peer_addr, bssid, ESP_NOW_ETH_ALEN);
     peer.channel = channel;
-    peer.ifidx = ESP_IF_WIFI_AP;
+    peer.ifidx = WIFI_IF_AP;
 
     if (esp_now_params.key) {
         peer.encrypt = true;
@@ -391,13 +391,13 @@ esp_now_netdev_t *netdev_esp_now_setup(void)
     }
 
     /* set the Station and SoftAP configuration */
-    result = esp_wifi_set_config(ESP_IF_WIFI_STA, &wifi_config_sta);
+    result = esp_wifi_set_config(WIFI_IF_STA, &wifi_config_sta);
     if (result != ESP_OK) {
         LOG_TAG_ERROR("esp_now", "esp_wifi_set_config station failed with "
                       "return value %d\n", result);
         return NULL;
     }
-    result = esp_wifi_set_config(ESP_IF_WIFI_AP, &wifi_config_ap);
+    result = esp_wifi_set_config(WIFI_IF_AP, &wifi_config_ap);
     if (result != ESP_OK) {
         LOG_TAG_ERROR("esp_now",
                       "esp_wifi_set_config softap failed with return value %d\n",
@@ -416,7 +416,7 @@ esp_now_netdev_t *netdev_esp_now_setup(void)
 
 #if !ESP_NOW_UNICAST
     /* all ESP-NOW nodes get the shared mac address on their station interface */
-    esp_wifi_set_mac(ESP_IF_WIFI_STA, (uint8_t*)_esp_now_mac);
+    esp_wifi_set_mac(WIFI_IF_STA, (uint8_t*)_esp_now_mac);
 #endif
 
 #endif /* MODULE_ESP_WIFI */
@@ -471,7 +471,7 @@ int esp_now_set_channel(uint8_t channel)
     /* channel is controlled by `esp_now`, try to reconfigure SoftAP */
     uint8_t old_channel = wifi_config_ap.ap.channel;
     wifi_config_ap.ap.channel = channel;
-    esp_err_t result = esp_wifi_set_config(ESP_IF_WIFI_AP, &wifi_config_ap);
+    esp_err_t result = esp_wifi_set_config(WIFI_IF_AP, &wifi_config_ap);
     if (result != ESP_OK) {
         LOG_TAG_ERROR("esp_now",
                       "esp_wifi_set_config softap failed with return value %d\n",
diff --git a/cpu/esp_common/esp-wifi/esp_wifi_netdev.c b/cpu/esp_common/esp-wifi/esp_wifi_netdev.c
index 30bb661a05494..2602ea9f221a7 100644
--- a/cpu/esp_common/esp-wifi/esp_wifi_netdev.c
+++ b/cpu/esp_common/esp-wifi/esp_wifi_netdev.c
@@ -501,13 +501,13 @@ static esp_err_t IRAM_ATTR _esp_system_event_handler(void *ctx, system_event_t *
 #ifdef MODULE_ESP_WIFI_AP
         case SYSTEM_EVENT_AP_START:
             _esp_wifi_started = 1;
-            esp_wifi_internal_reg_rxcb(ESP_IF_WIFI_AP, _esp_wifi_rx_cb);
+            esp_wifi_internal_reg_rxcb(WIFI_IF_AP, _esp_wifi_rx_cb);
             ESP_WIFI_DEBUG("WiFi started");
             break;
 
         case SYSTEM_EVENT_AP_STOP:
             _esp_wifi_started = 0;
-            esp_wifi_internal_reg_rxcb(ESP_IF_WIFI_AP, NULL);
+            esp_wifi_internal_reg_rxcb(WIFI_IF_AP, NULL);
             ESP_WIFI_DEBUG("WiFi stopped");
             break;
 
@@ -560,7 +560,7 @@ static esp_err_t IRAM_ATTR _esp_system_event_handler(void *ctx, system_event_t *
             esp_now_set_channel(_esp_wifi_channel);
 #endif
             /* register RX callback function */
-            esp_wifi_internal_reg_rxcb(ESP_IF_WIFI_STA, _esp_wifi_rx_cb);
+            esp_wifi_internal_reg_rxcb(WIFI_IF_STA, _esp_wifi_rx_cb);
 
             _esp_wifi_dev.connected = true;
             _esp_wifi_dev.event_conn++;
@@ -575,7 +575,7 @@ static esp_err_t IRAM_ATTR _esp_system_event_handler(void *ctx, system_event_t *
                               reason, _esp_wifi_get_disc_reason(reason));
 
             /* unregister RX callback function */
-            esp_wifi_internal_reg_rxcb(ESP_IF_WIFI_STA, NULL);
+            esp_wifi_internal_reg_rxcb(WIFI_IF_STA, NULL);
 
             _esp_wifi_dev.connected = false;
             _esp_wifi_dev.event_disc++;
@@ -661,10 +661,10 @@ static int _esp_wifi_send(netdev_t *netdev, const iolist_t *iolist)
     critical_exit();
 
 #ifdef MODULE_ESP_WIFI_AP
-    if (esp_wifi_internal_tx(ESP_IF_WIFI_AP, dev->tx_buf, dev->tx_len) == ESP_OK) {
+    if (esp_wifi_internal_tx(WIFI_IF_AP, dev->tx_buf, dev->tx_len) == ESP_OK) {
 #else /* MODULE_ESP_WIFI_AP */
     /* send the the packet to the peer(s) mac address */
-    if (esp_wifi_internal_tx(ESP_IF_WIFI_STA, dev->tx_buf, dev->tx_len) == ESP_OK) {
+    if (esp_wifi_internal_tx(WIFI_IF_STA, dev->tx_buf, dev->tx_len) == ESP_OK) {
 #endif
 #ifndef MCU_ESP8266
         /* for ESP8266 it is done in _esp_wifi_tx_cb */
@@ -758,9 +758,9 @@ static int _esp_wifi_get(netdev_t *netdev, netopt_t opt, void *val, size_t max_l
         case NETOPT_ADDRESS:
             assert(max_len >= ETHERNET_ADDR_LEN);
 #ifdef MODULE_ESP_WIFI_AP
-            esp_wifi_get_mac(ESP_MAC_WIFI_SOFTAP, (uint8_t *)val);
+            esp_wifi_get_mac(WIFI_IF_AP, (uint8_t *)val);
 #else /* MODULE_ESP_WIFI_AP */
-            esp_wifi_get_mac(ESP_MAC_WIFI_STA, (uint8_t *)val);
+            esp_wifi_get_mac(WIFI_IF_STA, (uint8_t *)val);
 #endif /* MODULE_ESP_WIFI_AP */
             return ETHERNET_ADDR_LEN;
         case NETOPT_LINK:
@@ -789,9 +789,9 @@ static int _esp_wifi_set(netdev_t *netdev, netopt_t opt, const void *val, size_t
         case NETOPT_ADDRESS:
             assert(max_len == ETHERNET_ADDR_LEN);
 #ifdef MODULE_ESP_WIFI_AP
-            esp_wifi_set_mac(ESP_MAC_WIFI_SOFTAP, (uint8_t *)val);
+            esp_wifi_set_mac(WIFI_IF_AP, (uint8_t *)val);
 #else /* MODULE_ESP_WIFI_AP */
-            esp_wifi_set_mac(ESP_MAC_WIFI_STA, (uint8_t *)val);
+            esp_wifi_set_mac(WIFI_IF_STA, (uint8_t *)val);
 #endif /* MODULE_ESP_WIFI_AP */
             return ETHERNET_ADDR_LEN;
         default:
@@ -972,13 +972,13 @@ void esp_wifi_setup (esp_wifi_netdev_t* dev)
 #if defined(MCU_ESP8266) || defined(MODULE_ESP_WIFI_AP)
 #if IS_ACTIVE(ESP_WIFI_SSID_DYNAMIC)
     uint8_t mac[ETHERNET_ADDR_LEN];
-    esp_wifi_get_mac(ESP_MAC_WIFI_SOFTAP, mac);
+    esp_wifi_get_mac(WIFI_IF_AP, mac);
     sprintf((char*)wifi_config_ap.ap.ssid, "%s_%02x%02x%02x%02x%02x%02x",
             WIFI_SSID, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
     wifi_config_ap.ap.ssid_len = strlen((char*)wifi_config_ap.ap.ssid);
 #endif /* IS_ACTIVE(ESP_WIFI_SSID_DYNAMIC) */
     /* set the SoftAP configuration */
-    result = esp_wifi_set_config(ESP_IF_WIFI_AP, &wifi_config_ap);
+    result = esp_wifi_set_config(WIFI_IF_AP, &wifi_config_ap);
     if (result != ESP_OK) {
         ESP_WIFI_LOG_ERROR("esp_wifi_set_config softap failed with return value %d", result);
         return;
@@ -989,7 +989,7 @@ void esp_wifi_setup (esp_wifi_netdev_t* dev)
 
 #ifndef MODULE_ESP_WIFI_AP
     /* set the Station configuration */
-    result = esp_wifi_set_config(ESP_IF_WIFI_STA, &wifi_config_sta);
+    result = esp_wifi_set_config(WIFI_IF_STA, &wifi_config_sta);
     if (result != ESP_OK) {
         ESP_WIFI_LOG_ERROR("esp_wifi_set_config station failed with return value %d", result);
         return;
diff --git a/cpu/esp_common/esp-xtensa/irq_arch.c b/cpu/esp_common/esp-xtensa/irq_arch.c
index e98e0afbd9ee3..f2b326a174a2e 100644
--- a/cpu/esp_common/esp-xtensa/irq_arch.c
+++ b/cpu/esp_common/esp-xtensa/irq_arch.c
@@ -28,6 +28,7 @@
 #include "esp/common_macros.h"
 
 #include "esp/xtensa_ops.h"
+#include "xtensa/config/core-isa.h"
 #include "xtensa/xtensa_context.h"
 
 #define ENABLE_DEBUG 0
@@ -46,7 +47,7 @@ unsigned int IRAM irq_disable(void)
        interrupt level (bits 3..0) */
     state &= 0xf;
 
-    DEBUG("%s %02x(%02x)\n", __func__, XCHAL_EXCM_LEVEL, state);
+    DEBUG("%s %02x(%02x)\n", __func__, XCHAL_EXCM_LEVEL, (unsigned)state);
     return state;
 }
 
@@ -63,7 +64,7 @@ unsigned int IRAM irq_enable(void)
        interrupt level (bits 3..0) */
     state &= 0xf;
 
-    DEBUG("%s %02x(%02x)\n", __func__, 0, state);
+    DEBUG("%s %02x(%02x)\n", __func__, 0, (unsigned)state);
     return state;
 }
 
@@ -84,7 +85,7 @@ void IRAM irq_restore(unsigned int state)
                       "rsync                \n"
                      : "+a" (old) : "a" (state) : "memory");
 
-    DEBUG("%s %02x(%02x)\n", __func__, state, old & 0xf);
+    DEBUG("%s %02x(%02x)\n", __func__, (unsigned)state, (unsigned)old & 0xf);
 }
 
 /**
diff --git a/cpu/esp_common/esp-xtensa/thread_arch.c b/cpu/esp_common/esp-xtensa/thread_arch.c
index c7c7370a91235..ce1d3b579fb44 100644
--- a/cpu/esp_common/esp-xtensa/thread_arch.c
+++ b/cpu/esp_common/esp-xtensa/thread_arch.c
@@ -275,7 +275,7 @@ void IRAM_ATTR thread_yield_higher(void)
 #if defined(ENABLE_DEBUG) && defined(DEVELHELP)
     thread_t *active_thread = thread_get_active();
     if (active_thread) {
-        DEBUG("%u old task %u %s %u\n", system_get_time(),
+        DEBUG("%"PRIu32" old task %u %s %u\n", system_get_time(),
                active_thread->pid, active_thread->name,
                active_thread->sp - active_thread-> stack_start);
     }
@@ -302,7 +302,7 @@ void IRAM_ATTR thread_yield_higher(void)
 #if defined(ENABLE_DEBUG) && defined(DEVELHELP)
     active_thread = thread_get_active();
     if (active_thread) {
-        DEBUG("%u new task %u %s %u\n", system_get_time(),
+        DEBUG("%"PRIu32" new task %u %s %u\n", system_get_time(),
                active_thread->pid, active_thread->name,
                active_thread->sp - active_thread-> stack_start);
     }
diff --git a/cpu/esp_common/freertos/ringbuf.c b/cpu/esp_common/freertos/ringbuf.c
index 3a1379be8217b..bcb485f7b03dc 100644
--- a/cpu/esp_common/freertos/ringbuf.c
+++ b/cpu/esp_common/freertos/ringbuf.c
@@ -38,6 +38,7 @@ RingbufHandle_t xRingbufferCreate(size_t xBufferSize, RingbufferType_t xBufferTy
         return NULL;
     }
     handle->item_size = 0;
+    handle->buf = NULL;
     ringbuffer_init((ringbuffer_t *)handle, handle->buf, xBufferSize);
 
     return handle;

From 9a072a08be5f32d07b9f6a0db4199521cf7dddbe Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Mon, 20 Mar 2023 18:36:05 +0100
Subject: [PATCH 12/17] sys: define CPU_RAM_SIZE as hex number

Some platforms such as RISC-V don't support numbers given with unit (32K)
---
 sys/Makefile.include | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sys/Makefile.include b/sys/Makefile.include
index 777e67f7e2d34..44334591ed711 100644
--- a/sys/Makefile.include
+++ b/sys/Makefile.include
@@ -165,7 +165,7 @@ endif
 
 ifneq (,$(filter tinyusb_dfu usbus_dfu riotboot_reset,$(USEMODULE)))
   CFLAGS += -DCPU_RAM_BASE=$(RAM_START_ADDR)
-  CFLAGS += -DCPU_RAM_SIZE=$(RAM_LEN)
+  CFLAGS += -DCPU_RAM_SIZE=$(shell printf "0x%x" $$(($(RAM_LEN:%K=%*1024))))
 endif
 
 ifneq (,$(filter test_utils_netdev_eth_minimal,$(USEMODULE)))

From 0de2570802ab224054f05926f5dc35984a147c92 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Wed, 5 Apr 2023 13:47:34 +0200
Subject: [PATCH 13/17] cpu/esp32: fix compilation with gcc 12.2

---
 cpu/esp32/Makefile.include          | 13 +++++++++++++
 cpu/esp32/bootloader/Makefile       |  7 +++++++
 cpu/esp32/esp-idf/esp_idf_cflags.mk |  7 +++++++
 cpu/esp32/esp-idf/esp_idf_support.c |  2 +-
 cpu/esp32/include/periph_cpu.h      | 10 ----------
 cpu/esp32/periph/adc.c              | 26 ++++++++++++++++++++------
 cpu/esp32/periph/flashpage.c        |  4 ++--
 cpu/esp32/periph/gpio.c             |  4 ++--
 cpu/esp32/periph/gpio_ll.c          | 20 ++++++++++++++++++--
 cpu/esp32/periph/gpio_ll_irq.c      | 22 +++++++++++++++++++++-
 cpu/esp32/periph/rtt.c              |  2 +-
 cpu/esp32/periph/rtt_hw_rtc.c       |  5 -----
 cpu/esp32/startup.c                 |  4 ++--
 cpu/esp32/syscalls.c                |  5 +++--
 14 files changed, 97 insertions(+), 34 deletions(-)

diff --git a/cpu/esp32/Makefile.include b/cpu/esp32/Makefile.include
index 956a132e2f712..be081ccd77cd0 100644
--- a/cpu/esp32/Makefile.include
+++ b/cpu/esp32/Makefile.include
@@ -207,6 +207,13 @@ CFLAGS += -D_CONST=const
 # TODO no relaxation yet
 ifneq (,$(filter riscv%,$(TARGET_ARCH)))
   CFLAGS += -mno-relax -march=rv32imc -mabi=ilp32 -DRISCV_NO_RELAX
+  GCC_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | \
+                               $(TARGET_ARCH)-gcc -march=rv32imac -mabi=ilp32 \
+                                                  -misa-spec=2.2 -E - > /dev/null 2>&1 && \
+                               echo 1 || echo 0)
+  ifeq (1,$(GCC_NEW_RISCV_ISA))
+    CFLAGS += -misa-spec=2.2
+  endif
 endif
 
 ifneq (,$(filter xtensa%,$(TARGET_ARCH)))
@@ -243,6 +250,12 @@ endif
 
 LINKFLAGS += -nostdlib -lgcc -Wl,-gc-sections
 
+# all ESP32x SoCs have to load executable code into IRAM
+# warning 'LOAD segment with RWX permissions' has to be disabled therefore
+ifeq (1,$(GCC_NEW_RISCV_ISA))
+  LINKFLAGS += -Wl,--no-warn-rwx-segments
+endif
+
 # Libraries needed when using esp_wifi_any pseudomodule
 ifneq (,$(filter esp_wifi_any,$(USEMODULE)))
   LINKFLAGS += -L$(ESP32_SDK_LIB_WIFI_DIR)/$(CPU_FAM)
diff --git a/cpu/esp32/bootloader/Makefile b/cpu/esp32/bootloader/Makefile
index dfb4a5df06647..df77159c0dded 100644
--- a/cpu/esp32/bootloader/Makefile
+++ b/cpu/esp32/bootloader/Makefile
@@ -171,6 +171,13 @@ ifneq (,$(filter riscv32%,$(TARGET_ARCH)))
   CFLAGS += -Wno-error=format=
   CFLAGS += -nostartfiles
   CFLAGS += -Wno-format
+  GCC_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | \
+                               $(TARGET_ARCH)-gcc -march=rv32imac -mabi=ilp32 \
+                                                  -misa-spec=2.2 -E - > /dev/null 2>&1 && \
+                               echo 1 || echo 0)
+  ifeq (1,$(GCC_NEW_RISCV_ISA))
+    CFLAGS += -misa-spec=2.2
+  endif
 endif
 
 ifneq (,$(filter xtensa%,$(TARGET_ARCH)))
diff --git a/cpu/esp32/esp-idf/esp_idf_cflags.mk b/cpu/esp32/esp-idf/esp_idf_cflags.mk
index a78bccfe0bca4..e83e214786864 100644
--- a/cpu/esp32/esp-idf/esp_idf_cflags.mk
+++ b/cpu/esp32/esp-idf/esp_idf_cflags.mk
@@ -42,4 +42,11 @@ ifneq (,$(filter riscv32%,$(TARGET_ARCH)))
   CFLAGS += -Wno-error=format=
   CFLAGS += -nostartfiles
   CFLAGS += -Wno-format
+  GCC_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | \
+                               $(TARGET_ARCH)-gcc -march=rv32imac -mabi=ilp32 \
+                                                  -misa-spec=2.2 -E - > /dev/null 2>&1 && \
+                               echo 1 || echo 0)
+  ifeq (1,$(GCC_NEW_RISCV_ISA))
+    CFLAGS += -misa-spec=2.2
+  endif
 endif
diff --git a/cpu/esp32/esp-idf/esp_idf_support.c b/cpu/esp32/esp-idf/esp_idf_support.c
index 6378932aa09c7..eb23ee349a66d 100644
--- a/cpu/esp32/esp-idf/esp_idf_support.c
+++ b/cpu/esp32/esp-idf/esp_idf_support.c
@@ -111,7 +111,7 @@ void IRAM_ATTR esp_log_writev(esp_log_level_t level,
      * We use the log level set for the given tag instead of using
      * the given log level.
      */
-    esp_log_level_t act_level = LOG_DEBUG;
+    esp_log_level_t act_level = (esp_log_level_t)LOG_DEBUG;
     size_t i;
     for (i = 0; i < ARRAY_SIZE(_log_levels); i++) {
         if (strcmp(tag, _log_levels[i].tag) == 0) {
diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h
index be07c9b679e84..fe2aaeea3139e 100644
--- a/cpu/esp32/include/periph_cpu.h
+++ b/cpu/esp32/include/periph_cpu.h
@@ -212,16 +212,6 @@ typedef enum {
 #define GPIO_DRIVE_20   GPIO_DRIVE_STRONG       /**< 20 mA (default) */
 #define GPIO_DRIVE_30   GPIO_DRIVE_STRONGEST    /**< 30 mA */
 
-#define HAVE_GPIO_IRQ_TRIG_T
-typedef enum {
-    GPIO_TRIGGER_NONE = 0,
-    GPIO_TRIGGER_EDGE_RISING = 1,
-    GPIO_TRIGGER_EDGE_FALLING = 2,
-    GPIO_TRIGGER_EDGE_BOTH = 3,
-    GPIO_TRIGGER_LEVEL_LOW = 4,
-    GPIO_TRIGGER_LEVEL_HIGH = 5
-} gpio_irq_trig_t;
-
 /* END: GPIO LL overwrites */
 
 #endif /* ndef DOXYGEN */
diff --git a/cpu/esp32/periph/adc.c b/cpu/esp32/periph/adc.c
index e79f40275a691..b552ab0549692 100644
--- a/cpu/esp32/periph/adc.c
+++ b/cpu/esp32/periph/adc.c
@@ -131,16 +131,22 @@ int adc_init(adc_t line)
     }
 
     if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_1) {
+        /* ensure compatibility of given adc_channel_t with adc1_channel_t */
+        assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC1_CHANNEL_MAX);
         /* initialize the ADC1 unit if needed */
         _adc1_ctrl_init();
         /* set the attenuation and configure its associated GPIO pin mux */
-        adc1_config_channel_atten(_adc_hw[rtcio].adc_channel, ADC_ATTEN_DB_11);
+        adc1_config_channel_atten((adc1_channel_t)_adc_hw[rtcio].adc_channel,
+                                  ADC_ATTEN_DB_11);
     }
     else if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_2) {
+        /* ensure compatibility of given adc_channel_t with adc2_channel_t */
+        assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC2_CHANNEL_MAX);
         /* initialize the ADC2 unit if needed */
         _adc2_ctrl_init();
         /* set the attenuation and configure its associated GPIO pin mux */
-        adc2_config_channel_atten(_adc_hw[rtcio].adc_channel, ADC_ATTEN_DB_11);
+        adc2_config_channel_atten((adc2_channel_t)_adc_hw[rtcio].adc_channel,
+                                  ADC_ATTEN_DB_11);
     }
     else {
         return -1;
@@ -165,13 +171,17 @@ int32_t adc_sample(adc_t line, adc_res_t res)
 
     if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_1) {
         adc1_config_width(_adc_esp_res_map[res].res);
-        raw = adc1_get_raw(_adc_hw[rtcio].adc_channel);
+         /* ensure compatibility of given adc_channel_t with adc1_channel_t */
+        assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC1_CHANNEL_MAX);
+        raw = adc1_get_raw((adc1_channel_t)_adc_hw[rtcio].adc_channel);
         if (raw < 0) {
             return -1;
         }
     }
     else if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_2) {
-        if (adc2_get_raw(_adc_hw[rtcio].adc_channel,
+         /* ensure compatibility of given adc_channel_t with adc2_channel_t */
+        assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC2_CHANNEL_MAX);
+        if (adc2_get_raw((adc2_channel_t)_adc_hw[rtcio].adc_channel,
                          _adc_esp_res_map[res].res, &raw) < 0) {
             return -1;
         }
@@ -189,10 +199,14 @@ int adc_set_attenuation(adc_t line, adc_atten_t atten)
     assert(rtcio != RTCIO_NA);
 
     if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_1) {
-        return adc1_config_channel_atten(_adc_hw[rtcio].adc_channel, atten);
+         /* ensure compatibility of given adc_channel_t with adc1_channel_t */
+        assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC1_CHANNEL_MAX);
+        return adc1_config_channel_atten((adc1_channel_t)_adc_hw[rtcio].adc_channel, atten);
     }
     else if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_2) {
-        return adc2_config_channel_atten(_adc_hw[rtcio].adc_channel, atten);
+         /* ensure compatibility of given adc_channel_t with adc2_channel_t */
+        assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC2_CHANNEL_MAX);
+        return adc2_config_channel_atten((adc2_channel_t)_adc_hw[rtcio].adc_channel, atten);
     }
 
     return -1;
diff --git a/cpu/esp32/periph/flashpage.c b/cpu/esp32/periph/flashpage.c
index 44e2bc02f9728..99bb2fea9c6ff 100644
--- a/cpu/esp32/periph/flashpage.c
+++ b/cpu/esp32/periph/flashpage.c
@@ -76,8 +76,8 @@ void IRAM_ATTR esp_flashpage_init(void)
                                  p_addr, 64, p_numof, 0);
     Cache_Resume_ICache(autoload);
 
-    DEBUG("%s DCache MMU set paddr=%08x vaddr=%08x size=%d n=%u\n", __func__,
-           p_addr, (uint32_t)&_fp_mem_start, CONFIG_ESP_FLASHPAGE_CAPACITY,
+    DEBUG("%s DCache MMU set paddr=%08"PRIx32" vaddr=%08"PRIx32" size=%d n=%"PRIu32"\n",
+           __func__, p_addr, (uint32_t)&_fp_mem_start, CONFIG_ESP_FLASHPAGE_CAPACITY,
            p_numof);
 
     if (res != ESP_OK) {
diff --git a/cpu/esp32/periph/gpio.c b/cpu/esp32/periph/gpio.c
index 5de146b697fdd..cb1b70569ee9b 100644
--- a/cpu/esp32/periph/gpio.c
+++ b/cpu/esp32/periph/gpio.c
@@ -229,8 +229,8 @@ int gpio_init(gpio_t pin, gpio_mode_t mode)
                       (mode == GPIO_OD_PU) ||
                       (mode == GPIO_IN_OD_PU)) ? GPIO_PULLUP_ENABLE
                                                : GPIO_PULLUP_DISABLE;
-    cfg.pull_down_en = (mode == GPIO_IN_PD) ? GPIO_PULLUP_ENABLE
-                                            : GPIO_PULLUP_DISABLE;
+    cfg.pull_down_en = (mode == GPIO_IN_PD) ? GPIO_PULLDOWN_ENABLE
+                                            : GPIO_PULLDOWN_DISABLE;
     cfg.intr_type = GPIO_INTR_DISABLE;
 
 #ifdef ESP_PM_WUP_PINS
diff --git a/cpu/esp32/periph/gpio_ll.c b/cpu/esp32/periph/gpio_ll.c
index 9622d3e110f04..af02263d30889 100644
--- a/cpu/esp32/periph/gpio_ll.c
+++ b/cpu/esp32/periph/gpio_ll.c
@@ -149,9 +149,25 @@ int gpio_ll_init(gpio_port_t port, uint8_t pin, const gpio_conf_t *conf)
     }
 
     /* if output pin, try to set drive strength */
+    gpio_drive_cap_t strength;
+    switch (conf->drive_strength) {
+    case GPIO_DRIVE_WEAKEST:
+        strength = GPIO_DRIVE_CAP_0;
+        break;
+    case GPIO_DRIVE_WEAK:
+        strength = GPIO_DRIVE_CAP_1;
+        break;
+    case GPIO_DRIVE_STRONG:
+        strength = GPIO_DRIVE_CAP_2;
+        break;
+    case GPIO_DRIVE_STRONGEST:
+        strength = GPIO_DRIVE_CAP_3;
+        break;
+    default:
+        strength = GPIO_DRIVE_CAP_DEFAULT;
+    }
     if ((cfg.pin_bit_mask & SOC_GPIO_VALID_OUTPUT_GPIO_MASK) &&
-        (esp_idf_gpio_set_drive_capability(gpio,
-                                           conf->drive_strength) != ESP_OK)) {
+        (esp_idf_gpio_set_drive_capability(gpio, strength) != ESP_OK)) {
         return -ENOTSUP;
     }
 
diff --git a/cpu/esp32/periph/gpio_ll_irq.c b/cpu/esp32/periph/gpio_ll_irq.c
index cd461a15dc115..919b77d525660 100644
--- a/cpu/esp32/periph/gpio_ll_irq.c
+++ b/cpu/esp32/periph/gpio_ll_irq.c
@@ -75,7 +75,27 @@ int gpio_ll_irq(gpio_port_t port, uint8_t pin, gpio_irq_trig_t trig,
     gpio_isr_service_installed = true;
 
     /* set the interrupt type for the pin */
-    if (esp_idf_gpio_set_intr_type(gpio, trig) != ESP_OK) {
+    gpio_int_type_t type;
+    switch (trig) {
+    case GPIO_TRIGGER_EDGE_FALLING:
+        type = GPIO_INTR_NEGEDGE;
+        break;
+    case GPIO_TRIGGER_EDGE_RISING:
+        type = GPIO_INTR_POSEDGE;
+        break;
+    case GPIO_TRIGGER_EDGE_BOTH:
+        type = GPIO_INTR_ANYEDGE;
+        break;
+    case GPIO_TRIGGER_LEVEL_HIGH:
+        type = GPIO_INTR_HIGH_LEVEL;
+        break;
+    case GPIO_TRIGGER_LEVEL_LOW:
+        type = GPIO_INTR_LOW_LEVEL;
+        break;
+    default:
+        type = GPIO_INTR_DISABLE;
+    }
+    if (esp_idf_gpio_set_intr_type(gpio, type) != ESP_OK) {
         return -1;
     }
 
diff --git a/cpu/esp32/periph/rtt.c b/cpu/esp32/periph/rtt.c
index fac348177dc24..dd9e9099244b1 100644
--- a/cpu/esp32/periph/rtt.c
+++ b/cpu/esp32/periph/rtt.c
@@ -58,7 +58,7 @@ extern uint32_t rtc_clk_slow_freq_get_hz(void);
 /* forward declaration of functions */
 void rtt_restore_counter(bool sys_time);
 static void _rtt_update_hw_alarm(void);
-static void IRAM_ATTR _rtt_isr(void *arg);
+static void _rtt_isr(void *arg);
 
 /* forward declarations of driver functions */
 uint64_t _rtc_get_counter(void);
diff --git a/cpu/esp32/periph/rtt_hw_rtc.c b/cpu/esp32/periph/rtt_hw_rtc.c
index 2d888cb82c424..6f12d634bd6e5 100644
--- a/cpu/esp32/periph/rtt_hw_rtc.c
+++ b/cpu/esp32/periph/rtt_hw_rtc.c
@@ -135,13 +135,8 @@ static void _rtc_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
     RTCCNTL.slp_timer0 = rtc_alarm & 0xffffffff;
     RTCCNTL.slp_timer1.slp_val_hi = rtc_alarm >> 32;
 
-#if __xtensa__
-    DEBUG("%s %08x%08x \n", __func__,
-          RTCCNTL.slp_timer1.slp_val_hi, RTCCNTL.slp_timer0);
-#else
     DEBUG("%s %08x%08x \n", __func__,
           (unsigned)RTCCNTL.slp_timer1.slp_val_hi, (unsigned)RTCCNTL.slp_timer0);
-#endif
 
     /* enable RTC timer alarm */
     RTCCNTL.slp_timer1.main_timer_alarm_en = 1;
diff --git a/cpu/esp32/startup.c b/cpu/esp32/startup.c
index 22cf2ed6f4204..8c96a17caafe3 100644
--- a/cpu/esp32/startup.c
+++ b/cpu/esp32/startup.c
@@ -240,8 +240,8 @@ static NORETURN void IRAM system_init (void)
 
     /* set log levels for SDK library outputs */
     extern void esp_log_level_set(const char* tag, esp_log_level_t level);
-    esp_log_level_set("wifi", LOG_DEBUG);
-    esp_log_level_set("gpio", LOG_DEBUG);
+    esp_log_level_set("wifi", (esp_log_level_t)LOG_DEBUG);
+    esp_log_level_set("gpio", (esp_log_level_t)LOG_DEBUG);
 
     /* init watchdogs */
     system_wdt_init();
diff --git a/cpu/esp32/syscalls.c b/cpu/esp32/syscalls.c
index 23fa853729e4f..aa215985a97d2 100644
--- a/cpu/esp32/syscalls.c
+++ b/cpu/esp32/syscalls.c
@@ -382,8 +382,9 @@ void system_wdt_init(void)
     wdt_hal_write_protect_enable(&rwdt);
 
 #if defined(CPU_FAM_ESP32)
-    DEBUG("%s TIMERG0 wdtconfig0=%08x wdtconfig1=%08x wdtconfig2=%08x "
-          "wdtconfig3=%08x wdtconfig4=%08x regclk=%08x\n", __func__,
+    DEBUG("%s TIMERG0 wdtconfig0=%08"PRIx32" wdtconfig1=%08"PRIx32
+          " wdtconfig2=%08"PRIx32" wdtconfig3=%08"PRIx32
+          " wdtconfig4=%08"PRIx32" regclk=%08"PRIx32"\n", __func__,
           TIMERG0.wdt_config0.val, TIMERG0.wdt_config1.val,
           TIMERG0.wdt_config2, TIMERG0.wdt_config3,
           TIMERG0.wdt_config4, TIMERG0.clk.val);

From d8d9a9bdc4a68fb211722a6395da08aa1b2281c1 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Tue, 4 Apr 2023 13:27:54 +0200
Subject: [PATCH 14/17] cpu/esp32: disable warnings in ESP-IDF for gcc 12.2

---
 cpu/esp32/bootloader/Makefile        | 4 ++++
 cpu/esp32/esp-idf/esp_idf_cflags.mk  | 8 ++++++++
 cpu/esp32/esp-idf/nvs_flash/Makefile | 4 ++++
 3 files changed, 16 insertions(+)

diff --git a/cpu/esp32/bootloader/Makefile b/cpu/esp32/bootloader/Makefile
index df77159c0dded..54b0c7bb92bf5 100644
--- a/cpu/esp32/bootloader/Makefile
+++ b/cpu/esp32/bootloader/Makefile
@@ -164,6 +164,10 @@ INCLUDES = \
 # CONFIG_ESPTOOLPY_FLASHFREQ_* and CONFIG_FLASHMODE_*
 CFLAGS = -include '$(RIOTBUILD_CONFIG_HEADER_C)' \
 
+# TODO: required to be able to compile with GCC 12.1, remove them after upgrade to ESP-IDF 5.1
+CFLAGS += -Wno-error=format=
+CFLAGS += -Wno-format
+
 ifneq (,$(filter riscv32%,$(TARGET_ARCH)))
   INCLUDES += -I$(ESP32_SDK_DIR)/components/riscv/include
   CFLAGS += -DCONFIG_IDF_TARGET_ARCH_RISCV
diff --git a/cpu/esp32/esp-idf/esp_idf_cflags.mk b/cpu/esp32/esp-idf/esp_idf_cflags.mk
index e83e214786864..b503f0e7a7ada 100644
--- a/cpu/esp32/esp-idf/esp_idf_cflags.mk
+++ b/cpu/esp32/esp-idf/esp_idf_cflags.mk
@@ -34,6 +34,14 @@ CFLAGS += -Wno-enum-compare
 # those are false positives.
 CFLAGS += -Wno-cast-align
 
+# TODO: required to be able to compile with GCC 12.1, remove them after upgrade to ESP-IDF 5.1
+CFLAGS += -Wno-attributes
+CFLAGS += -Wno-enum-conversion
+CFLAGS += -Wno-error=format=
+CFLAGS += -Wno-format
+CFLAGS += -Wno-use-after-free
+CFLAGS += -Wno-incompatible-pointer-types
+
 # additional CFLAGS required for RISC-V architecture
 ifneq (,$(filter riscv32%,$(TARGET_ARCH)))
   INCLUDES += -I$(ESP32_SDK_DIR)/components/riscv/include
diff --git a/cpu/esp32/esp-idf/nvs_flash/Makefile b/cpu/esp32/esp-idf/nvs_flash/Makefile
index aa45b59000f59..9642bbeefae1a 100644
--- a/cpu/esp32/esp-idf/nvs_flash/Makefile
+++ b/cpu/esp32/esp-idf/nvs_flash/Makefile
@@ -30,6 +30,10 @@ include ../esp_idf.mk
 # those are false positives.
 CFLAGS += -Wno-cast-align
 
+# TODO: required to be able to compile with GCC 12.1, remove them after upgrade to ESP-IDF 5.1
+CFLAGS += -Wno-error=format=
+CFLAGS += -Wno-format
+
 # additional CFLAGS required for RISC-V architecture
 ifneq (,$(filter riscv32%,$(TARGET_ARCH)))
   CFLAGS += -Wno-error=format=

From 9b081e52329b74dedfcaad86971dd802035d6f2c Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Mon, 17 Apr 2023 07:55:01 +0200
Subject: [PATCH 15/17] examples/suit_update: blacklist GD32V boards

---
 examples/suit_update/Makefile.ci | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/examples/suit_update/Makefile.ci b/examples/suit_update/Makefile.ci
index af5fa2da19fc3..d9bb81e4c84a5 100644
--- a/examples/suit_update/Makefile.ci
+++ b/examples/suit_update/Makefile.ci
@@ -24,6 +24,8 @@ BOARD_INSUFFICIENT_MEMORY := \
     nucleo-l412kb \
     saml10-xpro \
     saml11-xpro \
+    seeedstudio-gd32 \
+    sipeed-longan-nano \
     slstk3400a \
     stk3200 \
     stm32f0discovery \

From 90d2ae83fbcb570ff1a59c81bd841b15c4ec1357 Mon Sep 17 00:00:00 2001
From: Karl Fessel <karl.fessel@ovgu.de>
Date: Wed, 29 Mar 2023 15:06:59 +0200
Subject: [PATCH 16/17] cpp11-compat: thread::sleep_for in microseconds

---
 sys/cpp11-compat/include/riot/thread.hpp | 24 ++++++++++++++----------
 sys/cpp11-compat/thread.cpp              |  7 +++----
 2 files changed, 17 insertions(+), 14 deletions(-)

diff --git a/sys/cpp11-compat/include/riot/thread.hpp b/sys/cpp11-compat/include/riot/thread.hpp
index 219167268ee13..bc30048a78762 100644
--- a/sys/cpp11-compat/include/riot/thread.hpp
+++ b/sys/cpp11-compat/include/riot/thread.hpp
@@ -172,9 +172,9 @@ inline thread_id get_id() noexcept { return thread_id{thread_getpid()}; }
 inline void yield() noexcept { thread_yield(); }
 /**
  * @brief Puts the current thread to sleep.
- * @param[in] ns    Duration to sleep in nanoseconds.
+ * @param[in] us    Duration to sleep in microseconds.
  */
-void sleep_for(const std::chrono::nanoseconds& ns);
+void sleep_for(const std::chrono::microseconds& us);
 /**
  * @brief Puts the current thread to sleep.
  * @param[in] sleep_duration    The duration to sleep.
@@ -182,18 +182,22 @@ void sleep_for(const std::chrono::nanoseconds& ns);
 template <class Rep, class Period>
 void sleep_for(const std::chrono::duration<Rep, Period>& sleep_duration) {
   using namespace std::chrono;
-  if (sleep_duration > std::chrono::duration<Rep, Period>::zero()) {
-    constexpr std::chrono::duration<long double> max = nanoseconds::max();
-    nanoseconds ns;
+  if (sleep_duration > sleep_duration.zero()) {
+    constexpr duration<long double> max = microseconds::max();
+    microseconds us;
     if (sleep_duration < max) {
-      ns = duration_cast<nanoseconds>(sleep_duration);
-      if (ns < sleep_duration) {
-        ++ns;
+      us = duration_cast<microseconds>(sleep_duration);
+      if (us.count() == 0) {
+        // wait at least 1
+        us = microseconds(1);
+      }
+      if (us < sleep_duration) {
+        ++us;
       }
     } else {
-      ns = nanoseconds::max();
+      us = microseconds::max();
     }
-    sleep_for(ns);
+    sleep_for(us);
   }
 }
 /**
diff --git a/sys/cpp11-compat/thread.cpp b/sys/cpp11-compat/thread.cpp
index f19a41101b13b..4895b7e745685 100644
--- a/sys/cpp11-compat/thread.cpp
+++ b/sys/cpp11-compat/thread.cpp
@@ -68,11 +68,10 @@ unsigned thread::hardware_concurrency() noexcept {
 
 namespace this_thread {
 
-void sleep_for(const chrono::nanoseconds& ns) {
+void sleep_for(const chrono::microseconds& us) {
   using namespace chrono;
-  if (ns > nanoseconds::zero()) {
-    ztimer64_sleep(ZTIMER64_USEC,
-        static_cast<uint64_t>(duration_cast<microseconds>(ns).count()));
+  if (us > microseconds::zero()) {
+    ztimer64_sleep(ZTIMER64_USEC, us.count());
   }
 }
 

From 10cada1b8d4b133baca0f6c18e71f15a7b790095 Mon Sep 17 00:00:00 2001
From: Teufelchen1 <bennet.blischke@haw-hamburg.de>
Date: Mon, 17 Apr 2023 15:01:49 +0200
Subject: [PATCH 17/17] native/syscalls: rename real_clock_gettime to
 clock_gettime

---
 cpu/native/include/native_internal.h | 2 --
 cpu/native/periph/timer.c            | 2 +-
 cpu/native/syscalls.c                | 9 ---------
 3 files changed, 1 insertion(+), 12 deletions(-)

diff --git a/cpu/native/include/native_internal.h b/cpu/native/include/native_internal.h
index 3ad2d968a2862..7784cabaec1be 100644
--- a/cpu/native/include/native_internal.h
+++ b/cpu/native/include/native_internal.h
@@ -148,8 +148,6 @@ extern mode_t (*real_umask)(mode_t cmask);
 extern ssize_t (*real_writev)(int fildes, const struct iovec *iov, int iovcnt);
 extern ssize_t (*real_send)(int sockfd, const void *buf, size_t len, int flags);
 
-extern int (*real_clock_gettime)(clockid_t clk_id, struct timespec *tp);
-
 /**
  * data structures
  */
diff --git a/cpu/native/periph/timer.c b/cpu/native/periph/timer.c
index d0c27b11306db..229ae6efaf286 100644
--- a/cpu/native/periph/timer.c
+++ b/cpu/native/periph/timer.c
@@ -204,7 +204,7 @@ unsigned int timer_read(tim_t dev)
 
     _native_syscall_enter();
 
-    if (real_clock_gettime(CLOCK_MONOTONIC, &t) == -1) {
+    if (clock_gettime(CLOCK_MONOTONIC, &t) == -1) {
         err(EXIT_FAILURE, "timer_read: clock_gettime");
     }
 
diff --git a/cpu/native/syscalls.c b/cpu/native/syscalls.c
index 2840824f1415d..5c57cbb6c5128 100644
--- a/cpu/native/syscalls.c
+++ b/cpu/native/syscalls.c
@@ -106,11 +106,6 @@ mode_t (*real_umask)(mode_t cmask);
 ssize_t (*real_writev)(int fildes, const struct iovec *iov, int iovcnt);
 ssize_t (*real_send)(int sockfd, const void *buf, size_t len, int flags);
 
-#ifdef __MACH__
-#else
-int (*real_clock_gettime)(clockid_t clk_id, struct timespec *tp);
-#endif
-
 void _native_syscall_enter(void)
 {
     _native_in_syscall++;
@@ -553,8 +548,4 @@ void _native_init_syscalls(void)
     *(void **)(&real_ftell) = dlsym(RTLD_NEXT, "ftell");
     *(void **)(&real_fputc) = dlsym(RTLD_NEXT, "fputc");
     *(void **)(&real_fgetc) = dlsym(RTLD_NEXT, "fgetc");
-#ifdef __MACH__
-#else
-    *(void **)(&real_clock_gettime) = dlsym(RTLD_NEXT, "clock_gettime");
-#endif
 }