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Practice and Experiment with RTL Kernels
Apply and practice what you've learned in the earlier steps of this guide by running more hands-on examples, familiarize yourself with the online SDAccel document and make your way to the AWS forum to search knowledge and find answers.
Running and experimenting with these three examples of the RTL kernels will help you further familiarize yourself with the RTL kernel flow
This example shows vector addition performed by an RTL kernel with 2 clocks and the use of the --kernel_frequency
XOCC option.
Download and run this example from the SDAccel Github repository
This example shows how create an accelerated design using more than one RTL Kernel. In this example Vector Addition is performed with 2 kernels. Both Kernel_0 and Kernel_1 perform vector addition. The Kernel_1 reads the output from Kernel_0 as one of two inputs.
Download and run this example from the SDAccel Github repository
High Performance Matrix Multiply with precompiled XO file and advanced Vivado implementation options
This example implements a high performance matrix multiplication of two input matrices (A*B=C). The matrix multiplication kernel operates on matrices of type int16 and produces int16 results. Internally, the kernel has a systolic array of 2048 DSP units and is attached to two DDR banks. The DSP array runs at 400 MHz whereas the logic around the array runs at 300 MHz.
Download and run this example from the SDAccel Github repository
The AWS F1 SDAccel Development forum is the place to look for answers, share knowledge and get support. Make sure to subscribe to the forum by clicking the "Watch Forum" link in the "Available Actions" section.
Fundamental Concepts of Application Host Code
Introduction to the SDAccel RTL Kernel Wizard
UG1238: SDx Development Environment Release Notes, Installation, and Licensing Guide
UG1023: SDAccel Environment User Guide
SDAccel Examples Wiki