diff --git a/sbysrc/sby_core.py b/sbysrc/sby_core.py
index a1c9d029..c0444d73 100644
--- a/sbysrc/sby_core.py
+++ b/sbysrc/sby_core.py
@@ -1004,7 +1004,7 @@ def make_model(self, model_name):
         if model_name == "prep":
             with open(f"""{self.workdir}/model/design_prep.ys""", "w") as f:
                 print(f"# running in {self.workdir}/model/", file=f)
-                print(f"""read_ilang design.il""", file=f)
+                print(f"""read_rtlil design.il""", file=f)
                 if not self.opt_skip_prep:
                     print("scc -select; simplemap; select -clear", file=f)
                     print("memory_nordff", file=f)
@@ -1084,7 +1084,7 @@ def instance_hierarchy_error_callback(retcode):
         if re.match(r"^smt2(_syn)?(_nomem)?(_stbv|_stdt)?$", model_name):
             with open(f"{self.workdir}/model/design_{model_name}.ys", "w") as f:
                 print(f"# running in {self.workdir}/model/", file=f)
-                print(f"""read_ilang design_prep.il""", file=f)
+                print(f"""read_rtlil design_prep.il""", file=f)
                 print("hierarchy -smtcheck", file=f)
                 print("delete */t:$print", file=f)
                 print("formalff -assume", file=f)
@@ -1118,7 +1118,7 @@ def instance_hierarchy_error_callback(retcode):
         if re.match(r"^btor(_syn)?(_nomem)?$", model_name):
             with open(f"{self.workdir}/model/design_{model_name}.ys", "w") as f:
                 print(f"# running in {self.workdir}/model/", file=f)
-                print(f"""read_ilang design_prep.il""", file=f)
+                print(f"""read_rtlil design_prep.il""", file=f)
                 print("hierarchy -simcheck", file=f)
                 print("delete */t:$print", file=f)
                 print("formalff -assume", file=f)
@@ -1154,7 +1154,7 @@ def instance_hierarchy_error_callback(retcode):
         if model_name == "aig":
             with open(f"{self.workdir}/model/design_aiger.ys", "w") as f:
                 print(f"# running in {self.workdir}/model/", file=f)
-                print("read_ilang design_prep.il", file=f)
+                print("read_rtlil design_prep.il", file=f)
                 print("delete */t:$print", file=f)
                 print("hierarchy -simcheck", file=f)
                 print("formalff -assume", file=f)
diff --git a/tools/cexenum/cexenum.py b/tools/cexenum/cexenum.py
index 3ac88916..5c2c99c4 100755
--- a/tools/cexenum/cexenum.py
+++ b/tools/cexenum/cexenum.py
@@ -196,7 +196,7 @@ def __init__(self):
         self[tl.LogContext].scope = "aiger"
         (App.cache_dir / "design_aiger.ys").write_text(
             lines(
-                "read_ilang ../model/design_prep.il",
+                "read_rtlil ../model/design_prep.il",
                 "hierarchy -simcheck",
                 "flatten",
                 "setundef -undriven -anyseq",