Known Issue: Retrigger wait non-intuitive behavior

[akeshet]

If a word is marked as Wait For Retrigger, then even if the sequence does not receive a retrigger the values (analog and digital) for the BEGINNING of that word) will still get output. If there are analog groups or pulses running during the word they will wait.

In other words, the fpga begins waiting immediately after outputting the first sample of the given word.

This is a known issue, and is not particularly intuitive, but the fix would be rather involved and possibly cause other problems (it would require a major rewrite of the way in which variable timebase segments are calculated), so I think I will leave this as an open issue for now.

[akeshet]

In the user interface, I've renamed this feature to "Hold-then-retrigger" to at least raise the possibility of this behaviour in the user's mind.