diff --git a/arch/arm/boot/dts/rk3506.dtsi b/arch/arm/boot/dts/rk3506.dtsi
index 118e940bebab3..008580d38ccfb 100644
--- a/arch/arm/boot/dts/rk3506.dtsi
+++ b/arch/arm/boot/dts/rk3506.dtsi
@@ -69,6 +69,13 @@
 			clock-output-names = "xin32k";
 		};
 
+		clk_spdifrx_to_asrc: clk-spdifrx-to-asrc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+			clock-output-names = "clk_spdifrx_to_asrc";
+		};
+
 		mclkin_sai0: mclkin-sai0 {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
@@ -141,6 +148,34 @@
 			assigned-clocks = <&pvtpll_core>;
 			assigned-clock-rates = <1200000000>;
 		};
+
+		sai0_fs: sai0-fs {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+			clock-output-names = "sai0_fs";
+		};
+
+		sai1_fs: sai1-fs {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+			clock-output-names = "sai1_fs";
+		};
+
+		sai2_fs: sai2-fs {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+			clock-output-names = "sai2_fs";
+		};
+
+		sai3_fs: sai3-fs {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+			clock-output-names = "sai3_fs";
+		};
 	};
 
 	cpus {
@@ -909,6 +944,46 @@
 		status = "disabled";
 	};
 
+	asrc0: asrc@ff3c0000 {
+		compatible = "rockchip,rk3506-asrc";
+		reg = <0xff3c0000 0x1000>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_ASRC0>, <&cru HCLK_ASRC0>,
+			 <&cru LRCK_ASRC0_SRC>, <&cru LRCK_ASRC0_DST>;
+		clock-names = "mclk", "hclk",
+			      "src_lrck", "dst_lrck";
+	//	dmas = <&dmac0 0 0xff2880a4 0x00010001 0xff2880a8 0x00030002>,
+	//	       <&dmac0 1 0xff2880a4 0x00020002 0xff2880a8 0x000c0008>;
+		dmas = <&dmac1 16 0xff2880a4 0x00010000 0x0 0x0>,
+		       <&dmac1 17 0xff2880a4 0x00020000 0x0 0x0>;
+		dma-names = "rx", "tx";
+		resets = <&cru SRST_ASRC0>, <&cru SRST_H_ASRC0>;
+		reset-names = "m", "h";
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "ASRC0";
+		status = "disabled";
+	};
+
+	asrc1: asrc@ff3d0000 {
+		compatible = "rockchip,rk3506-asrc";
+		reg = <0xff3d0000 0x1000>;
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_ASRC1>, <&cru HCLK_ASRC1>,
+			 <&cru LRCK_ASRC1_SRC>, <&cru LRCK_ASRC1_DST>;
+		clock-names = "mclk", "hclk",
+			      "src_lrck", "dst_lrck";
+	//	dmas = <&dmac0 2 0xff2880a4 0x00040004 0xff2880a8 0x00300020>,
+	//	       <&dmac0 3 0xff2880a4 0x00080008 0xff2880a8 0x00c00080>;
+		dmas = <&dmac1 18 0xff2880a4 0x00040000 0x0 0x0>,
+		       <&dmac1 19 0xff2880a4 0x00080000 0x0 0x0>;
+		dma-names = "rx", "tx";
+		resets = <&cru SRST_ASRC1>, <&cru SRST_H_ASRC1>;
+		reset-names = "m", "h";
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "ASRC1";
+		status = "disabled";
+	};
+
 	mmc: mmc@ff480000 {
 		compatible = "rockchip,rk3506-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0xff480000 0x4000>;