Fix Reg() to properly handle clocks as rvalues (backport #3775)

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This is an automatic backport of pull request #3775 done by Mergify.
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	modified:   core/src/main/scala/chisel3/Reg.scala

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	deleted by us:   src/test/scala/chiselTests/ClockSpec.scala

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Original PR Body

Previously, it was not calling .ref. It was thus not properly:

1. Checking that the clock is bound hardware
2. Checking that the clock is visible in the current scope
3. Reifying the clock if its a view

Note that RegInit() was already correctly calling .ref.

h/t @nandor for noticing this, pretty crazy such a fundamental bug has been lingering without being noticed.

Contributor Checklist

• Did you add Scaladoc to every public function/method?
• Did you add at least one test demonstrating the PR?
• Did you delete any extraneous printlns/debugging code?
• Did you specify the type of improvement?
• Did you add appropriate documentation in docs/src?
• Did you request a desired merge strategy?
• Did you add text to be included in the Release Notes for this change?

Type of Improvement

• Bugfix

Desired Merge Strategy

• Squash

Release Notes

• Clocks are now properly supported by DataView (including FlatIO)
• Users will also received better error messages when providing invalid clocks to Reg()

Reviewer Checklist (only modified by reviewer)

• Did you add the appropriate labels? (Select the most appropriate one based on the "Type of Improvement")
• Did you mark the proper milestone (Bug fix: 3.6.x, 5.x, or 6.x depending on impact, API modification or big change: 7.0)?
• Did you review?
• Did you check whether all relevant Contributor checkboxes have been checked?
• Did you do one of the following when ready to merge:
  • Squash: You/ the contributor Enable auto-merge (squash), clean up the commit message, and label with Please Merge.
  • Merge: Ensure that contributor has cleaned up their commit history, then merge with Create a merge commit.

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