-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathoka-1.html
47 lines (43 loc) · 1.99 KB
/
oka-1.html
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
<HTML>
<HEAD>
<META NAME="GENERATOR" CONTENT="LinuxDoc-Tools 0.9.66">
<TITLE>OKA (pipeline hazards description translator): Introduction</TITLE>
<LINK HREF="oka-2.html" REL=next>
<LINK HREF="oka.html#toc1" REL=contents>
</HEAD>
<BODY>
<A HREF="oka-2.html">Next</A>
Previous
<A HREF="oka.html#toc1">Contents</A>
<HR>
<H2><A NAME="s1">1.</A> <A HREF="oka.html#toc1">Introduction</A></H2>
<P>OKA is a translator of a processor pipeline hazards description (PHD)
into code for fast recognition of pipeline hazards. Instruction
execution can be started only if its issue conditions are satisfied.
If not, instruction is interlocked until its conditions are satisfied.
Such an "interlock (pipeline) delay" causes interruption of the
fetching of successor instructions (or demands NOP instructions, e.g.
for MIPS).</P>
<P>There are two major kind of interlock delays in modern superscalar
RISC processors. The first one is data dependence delay. The
instruction execution is not started until all source data has been
evaluated by previous instructions (there are more complex cases when
the instruction execution starts even when the data are not evaluated
but will be ready till given time after the instruction execution
start). Taking into account of such kind delay is simple. Data
dependence (true, output, and anti-dependence) delay between two
instructions is given by constant. In the most cases this approach is
adequate. The second kind of interlock delay is reservation delay.
Two such way dependent instructions under execution will be in need of
shared processors resources, i.e. buses, internal registers, and/or
functional units, which are reserved for some time. Taking into
account of this kind of delay is complex especially for modern RISC
processors. The goal of OKA is to generate code for fast recognition
of such kind delay (pipeline hazards).</P>
<HR>
<A HREF="oka-2.html">Next</A>
Previous
<A HREF="oka.html#toc1">Contents</A>
</BODY>
</HTML>