Feature: Support address translation

[dpretet]

Some interconnect topologies are the combination of multiple AXI4 sub-systems. All these sub-system have their own memory map, which may not match the overall address ranges of the global system. This is specially true when it comes to bridge two different worlds like AXI and a PCIe, I2C or SPI based sub-system.

A master or slave interface should be able to translate address from one memory domain to another, described in multiple address tables. All the tables must support secure/non-secure attribute and unmapped range in order to complete a request with SLVERR or DECERR.