@@ -106,13 +106,24 @@ void serial_printf(const char* fmt, ...)
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#define MACONX_BANK 0x02
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#define MACON1 0x00
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+ #define MACSTAT1 0x01
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#define MACON3 0x02
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#define MACON4 0x03
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#define MABBIPG 0x04
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#define MAIPGL 0x06
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#define MAIPGH 0x07
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#define MAMXFLL 0x0a
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#define MAMXFLH 0x0b
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+ #define MACON2 0x10
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+ #define MACSTAT2 0x11
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+ #define MICMD 0x12
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+ #define MIREGADR 0x14
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+ #define MIRDL 0x18
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+ #define MIRDH 0x19
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+
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+ /* MICMD Register Bit Definitions */
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+ #define MICMD_MIISCAN 0x02
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+ #define MICMD_MIIRD 0x01
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#define MACON1_TXPAUS 0x08
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#define MACON1_RXPAUS 0x04
@@ -135,6 +146,9 @@ void serial_printf(const char* fmt, ...)
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#define MISTAT 0x0a
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#define EREVID 0x12
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+ /* MISTAT Register Bit Definitions */
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+ #define MISTAT_BUSY 0x01
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+
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#define EPKTCNT_BANK 0x01
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#define ERXFCON 0x18
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#define EPKTCNT 0x19
@@ -720,3 +734,26 @@ uint16_t ENC28J60::readFrameData(uint8_t* buffer, uint16_t framesize)
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return _len;
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}
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+
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+ uint16_t ENC28J60::phyread (uint8_t reg)
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+ {
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+ // ( https://github.com/JAndrassy/EthernetENC/tree/master/src/utility/enc28j60.h )
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+
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+ setregbank (MACONX_BANK);
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+ writereg (MIREGADR, reg);
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+ writereg (MICMD, MICMD_MIIRD);
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+ // wait until the PHY read completes
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+ while (readreg (MISTAT) & MISTAT_BUSY)
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+ {
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+ delayMicroseconds (15 );
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+ }
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+ writereg (MICMD, 0 );
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+ return (readreg (MIRDL) | readreg (MIRDH) << 8 );
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+ }
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+
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+ bool ENC28J60::isLinked ()
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+ {
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+ // ( https://github.com/JAndrassy/EthernetENC/tree/master/src/utility/enc28j60.h )
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+
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+ return !!(phyread (MACSTAT2) & 0x400 );
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+ }
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