From 28bf5805a5b50970ff962092f7e5458c349e3428 Mon Sep 17 00:00:00 2001
From: me-no-dev <hristo@espressif.com>
Date: Mon, 27 Jan 2025 14:06:54 +0200
Subject: [PATCH] fix(psram): Add support for ESP32-C5 PSRAM

---
 boards.txt                        | 5 +++++
 cores/esp32/chip-debug-report.cpp | 3 +++
 cores/esp32/esp32-hal-psram.c     | 2 ++
 3 files changed, 10 insertions(+)

diff --git a/boards.txt b/boards.txt
index b39440b8d0c..944b9bc1a58 100644
--- a/boards.txt
+++ b/boards.txt
@@ -210,6 +210,11 @@ esp32c5.menu.JTAGAdapter.bridge=ESP USB Bridge
 esp32c5.menu.JTAGAdapter.bridge.build.openocdscript=esp32c5-bridge.cfg
 esp32c5.menu.JTAGAdapter.bridge.build.copy_jtag_files=1
 
+esp32c5.menu.PSRAM.disabled=Disabled
+esp32c5.menu.PSRAM.disabled.build.defines=
+esp32c5.menu.PSRAM.enabled=Enabled
+esp32c5.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
+
 esp32c5.menu.CDCOnBoot.default=Disabled
 esp32c5.menu.CDCOnBoot.default.build.cdc_on_boot=0
 esp32c5.menu.CDCOnBoot.cdc=Enabled
diff --git a/cores/esp32/chip-debug-report.cpp b/cores/esp32/chip-debug-report.cpp
index e3f3f431f81..281c7bdb62d 100644
--- a/cores/esp32/chip-debug-report.cpp
+++ b/cores/esp32/chip-debug-report.cpp
@@ -67,6 +67,9 @@ static void printPkgVersion(void) {
 #elif CONFIG_IDF_TARGET_ESP32P4
   uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_MAC_SYS_2_REG, EFUSE_PKG_VERSION);
   chip_report_printf("%lu", pkg_ver);
+#elif CONFIG_IDF_TARGET_ESP32C5
+  uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_MAC_SYS2_REG, EFUSE_PKG_VERSION);
+  chip_report_printf("%lu", pkg_ver);
 #else
   chip_report_printf("Unknown");
 #endif
diff --git a/cores/esp32/esp32-hal-psram.c b/cores/esp32/esp32-hal-psram.c
index 3c7a51c3343..0d57a67ede4 100644
--- a/cores/esp32/esp32-hal-psram.c
+++ b/cores/esp32/esp32-hal-psram.c
@@ -29,6 +29,8 @@
 #include "esp32s3/rom/cache.h"
 #elif CONFIG_IDF_TARGET_ESP32P4
 #include "esp32p4/rom/cache.h"
+#elif CONFIG_IDF_TARGET_ESP32C5
+#include "esp32c5/rom/cache.h"
 #else
 #error Target CONFIG_IDF_TARGET is not supported
 #endif