@@ -477,9 +477,9 @@ void cpu::addToMMR1(const gam_rc_t & g)
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}
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// GAM = general addressing modes
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- gam_rc_t cpu::getGAM (const uint8_t mode, const uint8_t reg, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool read_value)
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+ gam_rc_t cpu::getGAM (const uint8_t mode, const uint8_t reg, const word_mode_t word_mode, const bool read_value)
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{
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- gam_rc_t g { word_mode, mode_selection , i_space, mode, { }, { }, { }, { } };
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+ gam_rc_t g { word_mode, rm_cur , i_space, mode, { }, { }, { }, { } };
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d_i_space_t isR7_space = reg == 7 ? i_space : (b->getMMU ()->get_use_data_space (getPSW_runmode ()) ? d_space : i_space);
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// ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ always d_space here? TODO
@@ -491,60 +491,60 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
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switch (mode) {
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case 0 : // Rn
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g.reg = reg;
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- g.value = getRegister (reg, mode_selection ) & (word_mode == wm_byte ? 0xff : 0xffff );
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+ g.value = getRegister (reg, rm_cur ) & (word_mode == wm_byte ? 0xff : 0xffff );
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break ;
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case 1 : // (Rn)
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- g.addr = getRegister (reg, mode_selection );
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+ g.addr = getRegister (reg, rm_cur );
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if (read_value)
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- g.value = b->read (g.addr .value (), word_mode, mode_selection , isR7_space);
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+ g.value = b->read (g.addr .value (), word_mode, rm_cur , isR7_space);
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break ;
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case 2 : // (Rn)+ / #n
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- g.addr = getRegister (reg, mode_selection );
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+ g.addr = getRegister (reg, rm_cur );
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if (read_value)
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- g.value = b->read (g.addr .value (), word_mode, mode_selection , isR7_space);
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- addRegister (reg, mode_selection , word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1 );
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+ g.value = b->read (g.addr .value (), word_mode, rm_cur , isR7_space);
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+ addRegister (reg, rm_cur , word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1 );
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g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1 , reg };
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break ;
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case 3 : // @(Rn)+ / @#a
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- g.addr = b->read (getRegister (reg, mode_selection ), wm_word, mode_selection , isR7_space);
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+ g.addr = b->read (getRegister (reg, rm_cur ), wm_word, rm_cur , isR7_space);
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// might be wrong: the adds should happen when the read is really performed, because of traps
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- addRegister (reg, mode_selection , 2 );
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+ addRegister (reg, rm_cur , 2 );
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g.mmr1_update = { 2 , reg };
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g.space = d_space;
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if (read_value)
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- g.value = b->read (g.addr .value (), word_mode, mode_selection , g.space );
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+ g.value = b->read (g.addr .value (), word_mode, rm_cur , g.space );
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break ;
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case 4 : // -(Rn)
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- addRegister (reg, mode_selection , word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1 );
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+ addRegister (reg, rm_cur , word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1 );
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g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1 , reg };
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g.space = d_space;
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- g.addr = getRegister (reg, mode_selection );
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+ g.addr = getRegister (reg, rm_cur );
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if (read_value)
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- g.value = b->read (g.addr .value (), word_mode, mode_selection , isR7_space);
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+ g.value = b->read (g.addr .value (), word_mode, rm_cur , isR7_space);
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break ;
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case 5 : // @-(Rn)
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- addRegister (reg, mode_selection , -2 );
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+ addRegister (reg, rm_cur , -2 );
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g.mmr1_update = { -2 , reg };
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- g.addr = b->read (getRegister (reg, mode_selection ), wm_word, mode_selection , isR7_space);
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+ g.addr = b->read (getRegister (reg, rm_cur ), wm_word, rm_cur , isR7_space);
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g.space = d_space;
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if (read_value)
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- g.value = b->read (g.addr .value (), word_mode, mode_selection , g.space );
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+ g.value = b->read (g.addr .value (), word_mode, rm_cur , g.space );
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break ;
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case 6 : // x(Rn) / a
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- next_word = b->read (getPC (), wm_word, mode_selection , i_space);
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- addRegister (7 , mode_selection , + 2 );
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- g.addr = getRegister (reg, mode_selection ) + next_word;
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+ next_word = b->read (getPC (), wm_word, rm_cur , i_space);
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+ addRegister (7 , rm_cur , + 2 );
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+ g.addr = getRegister (reg, rm_cur ) + next_word;
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g.space = d_space;
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if (read_value)
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- g.value = b->read (g.addr .value (), word_mode, mode_selection , g.space );
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+ g.value = b->read (g.addr .value (), word_mode, rm_cur , g.space );
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break ;
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case 7 : // @x(Rn) / @a
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- next_word = b->read (getPC (), wm_word, mode_selection , i_space);
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- addRegister (7 , mode_selection , + 2 );
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- g.addr = b->read (getRegister (reg, mode_selection ) + next_word, wm_word, mode_selection , d_space);
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+ next_word = b->read (getPC (), wm_word, rm_cur , i_space);
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+ addRegister (7 , rm_cur , + 2 );
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+ g.addr = b->read (getRegister (reg, rm_cur ) + next_word, wm_word, rm_cur , d_space);
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g.space = d_space;
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if (read_value)
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- g.value = b->read (g.addr .value (), word_mode, mode_selection , g.space );
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+ g.value = b->read (g.addr .value (), word_mode, rm_cur , g.space );
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break ;
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}
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@@ -570,7 +570,7 @@ bool cpu::putGAM(const gam_rc_t & g, const uint16_t value)
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gam_rc_t cpu::getGAMAddress (const uint8_t mode, const int reg, const word_mode_t word_mode)
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{
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- return getGAM (mode, reg, word_mode, rm_cur, false );
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+ return getGAM (mode, reg, word_mode, false );
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}
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bool cpu::double_operand_instructions (const uint16_t instr)
@@ -599,7 +599,7 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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switch (operation) {
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case 0b001 : { // MOV/MOVB Move Word/Byte
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- gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode, rm_cur );
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+ gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode);
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bool set_flags = true ;
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@@ -621,9 +621,9 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b010 : { // CMP/CMPB Compare Word/Byte
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- gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode, rm_cur );
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+ gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode);
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- auto g_dst = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (g_dst);
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addToMMR1 (g_src);
@@ -639,9 +639,9 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b011 : { // BIT/BITB Bit Test Word/Byte
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- gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode, rm_cur );
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+ gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode);
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- auto g_dst = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (g_dst);
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addToMMR1 (g_src);
@@ -654,7 +654,7 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b100 : { // BIC/BICB Bit Clear Word/Byte
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- gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode, rm_cur );
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+ gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode);
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if (dst_mode == 0 ) {
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addToMMR1 (g_src); // keep here because of order of updates
@@ -667,7 +667,7 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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setPSW_flags_nzv (result, word_mode);
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}
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else {
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- auto g_dst = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (g_dst);
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addToMMR1 (g_src);
@@ -682,7 +682,7 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b101 : { // BIS/BISB Bit Set Word/Byte
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- gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode, rm_cur );
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+ gam_rc_t g_src = getGAM (src_mode, src_reg, word_mode);
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if (dst_mode == 0 ) {
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addToMMR1 (g_src); // keep here because of order of updates
@@ -697,7 +697,7 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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setPSW_v (false );
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}
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else {
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- auto g_dst = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (g_dst);
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addToMMR1 (g_src);
@@ -715,9 +715,9 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b110 : { // ADD/SUB Add/Subtract Word
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- auto g_ssrc = getGAM (src_mode, src_reg, wm_word, rm_cur );
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+ auto g_ssrc = getGAM (src_mode, src_reg, wm_word);
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- auto g_dst = getGAM (dst_mode, dst_reg, wm_word, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, wm_word);
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addToMMR1 (g_dst);
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addToMMR1 (g_ssrc);
@@ -776,7 +776,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 0 : { // MUL
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int16_t R1 = getRegister (reg);
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- auto R2g = getGAM (dst_mode, dst_reg, wm_word, rm_cur );
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+ auto R2g = getGAM (dst_mode, dst_reg, wm_word);
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addToMMR1 (R2g);
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int16_t R2 = R2g.value .value ();
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@@ -793,7 +793,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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}
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case 1 : { // DIV
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- auto R2g = getGAM (dst_mode, dst_reg, wm_word, rm_cur );
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+ auto R2g = getGAM (dst_mode, dst_reg, wm_word);
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addToMMR1 (R2g);
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int16_t divider = R2g.value .value ();
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@@ -840,7 +840,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 2 : { // ASH
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uint32_t R = getRegister (reg), oldR = R;
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- auto g_dst = getGAM (dst_mode, dst_reg, wm_word, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, wm_word);
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addToMMR1 (g_dst);
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uint16_t shift = g_dst.value .value () & 077 ;
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@@ -894,7 +894,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 3 : { // ASHC
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uint32_t R0R1 = (uint32_t (getRegister (reg)) << 16 ) | getRegister (reg | 1 );
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- auto g_dst = getGAM (dst_mode, dst_reg, wm_word, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, wm_word);
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addToMMR1 (g_dst);
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uint16_t shift = g_dst.value .value () & 077 ;
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@@ -950,7 +950,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 4 : { // XOR (word only)
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uint16_t reg_v = getRegister (reg); // in case it is R7
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- auto g_dst = getGAM (dst_mode, dst_reg, wm_word, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, wm_word);
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addToMMR1 (g_dst);
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uint16_t vl = g_dst.value .value () ^ reg_v;
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@@ -989,7 +989,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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if (word_mode == wm_byte) // handled elsewhere
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return false ;
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- auto g_dst = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (g_dst);
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uint16_t v = g_dst.value .value ();
@@ -1045,7 +1045,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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set_flags = true ;
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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v = a.value .value ();
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@@ -1080,7 +1080,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setRegister (dst_reg, v);
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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int32_t vl = (a.value .value () + 1 ) & (word_mode == wm_byte ? 0xff : 0xffff );
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@@ -1112,7 +1112,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setRegister (dst_reg, v);
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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int32_t vl = (a.value .value () - 1 ) & (word_mode == wm_byte ? 0xff : 0xffff );
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@@ -1144,7 +1144,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setRegister (dst_reg, v);
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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uint16_t v = -a.value .value ();
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@@ -1179,7 +1179,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setRegister (dst_reg, v);
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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const uint16_t vo = a.value .value ();
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bool org_c = getPSW_c ();
@@ -1216,7 +1216,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setRegister (dst_reg, v);
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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const uint16_t vo = a.value .value ();
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bool org_c = getPSW_c ();
@@ -1235,7 +1235,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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case 0b000101111 : { // TST/TSTB
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- auto g = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto g = getGAM (dst_mode, dst_reg, word_mode);
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uint16_t v = g.value .value ();
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addToMMR1 (g);
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@@ -1264,7 +1264,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setPSW_v (getPSW_c () ^ getPSW_n ());
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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uint16_t t = a.value .value ();
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bool new_carry = t & 1 ;
@@ -1310,7 +1310,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setPSW_v (getPSW_c () ^ getPSW_n ());
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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uint16_t t = a.value .value ();
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bool new_carry = false ;
@@ -1357,7 +1357,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setPSW_v (getPSW_n () ^ getPSW_c ());
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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uint16_t v = a.value .value ();
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@@ -1398,7 +1398,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setRegister (dst_reg, v);
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}
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else {
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- auto a = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto a = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (a);
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uint16_t vl = a.value .value ();
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uint16_t v = (vl << 1 ) & (word_mode == wm_byte ? 0xff : 0xffff );
@@ -1467,7 +1467,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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if (word_mode == wm_byte) { // MTPS
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#if 0 // not in the PDP-11/70
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psw &= 0xff00; // only alter lower 8 bits
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- psw |= getGAM(dst_mode, dst_reg, word_mode, rm_cur ).value.value() & 0xef; // can't change bit 4
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+ psw |= getGAM(dst_mode, dst_reg, word_mode).value.value() & 0xef; // can't change bit 4
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#else
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trap (010 );
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#endif
@@ -1484,7 +1484,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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case 0b000110111 : { // MFPS (get PSW to something) / SXT
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if (word_mode == wm_byte) { // MFPS
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#if 0 // not in the PDP-11/70
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- auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur );
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+ auto g_dst = getGAM(dst_mode, dst_reg, word_mode);
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uint16_t temp = psw & 0xff;
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bool extend_b7 = psw & 128;
@@ -1504,7 +1504,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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#endif
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}
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else { // SXT
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- auto g_dst = getGAM (dst_mode, dst_reg, word_mode, rm_cur );
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+ auto g_dst = getGAM (dst_mode, dst_reg, word_mode);
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addToMMR1 (g_dst);
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uint16_t vl = -getPSW_n ();
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