@@ -238,7 +238,7 @@ void bus::init()
238
238
mmu_->setMMR3 (0 );
239
239
}
240
240
241
- uint16_t bus::read (const uint16_t addr_in, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool peek_only, const d_i_space_t space)
241
+ uint16_t bus::read (const uint16_t addr_in, const word_mode_t word_mode, const rm_selection_t mode_selection, const d_i_space_t space)
242
242
{
243
243
int run_mode = mode_selection == rm_cur ? c->getPSW_runmode () : c->getPSW_prev_runmode ();
244
244
@@ -253,60 +253,58 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
253
253
// // REGISTERS ////
254
254
if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5 ) { // kernel R0-R5
255
255
uint16_t temp = c->getRegister (a - ADDR_KERNEL_R) & (word_mode == wm_byte ? 0xff : 0xffff );
256
- if (!peek_only) TRACE (" READ-I/O kernel R%d: %06o" , a - ADDR_KERNEL_R, temp);
256
+ TRACE (" READ-I/O kernel R%d: %06o" , a - ADDR_KERNEL_R, temp);
257
257
return temp;
258
258
}
259
259
if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5 ) { // user R0-R5
260
260
uint16_t temp = c->getRegister (a - ADDR_USER_R) & (word_mode == wm_byte ? 0xff : 0xffff );
261
- if (!peek_only) TRACE (" READ-I/O user R%d: %06o" , a - ADDR_USER_R, temp);
261
+ TRACE (" READ-I/O user R%d: %06o" , a - ADDR_USER_R, temp);
262
262
return temp;
263
263
}
264
264
if (a == ADDR_KERNEL_SP) { // kernel SP
265
265
uint16_t temp = c->getStackPointer (0 ) & (word_mode == wm_byte ? 0xff : 0xffff );
266
- if (!peek_only) TRACE (" READ-I/O kernel SP: %06o" , temp);
266
+ TRACE (" READ-I/O kernel SP: %06o" , temp);
267
267
return temp;
268
268
}
269
269
if (a == ADDR_PC) { // PC
270
270
uint16_t temp = c->getPC () & (word_mode == wm_byte ? 0xff : 0xffff );
271
- if (!peek_only) TRACE (" READ-I/O PC: %06o" , temp);
271
+ TRACE (" READ-I/O PC: %06o" , temp);
272
272
return temp;
273
273
}
274
274
if (a == ADDR_SV_SP) { // supervisor SP
275
275
uint16_t temp = c->getStackPointer (1 ) & (word_mode == wm_byte ? 0xff : 0xffff );
276
- if (!peek_only) TRACE (" READ-I/O supervisor SP: %06o" , temp);
276
+ TRACE (" READ-I/O supervisor SP: %06o" , temp);
277
277
return temp;
278
278
}
279
279
if (a == ADDR_USER_SP) { // user SP
280
280
uint16_t temp = c->getStackPointer (3 ) & (word_mode == wm_byte ? 0xff : 0xffff );
281
- if (!peek_only) TRACE (" READ-I/O user SP: %06o" , temp);
281
+ TRACE (" READ-I/O user SP: %06o" , temp);
282
282
return temp;
283
283
}
284
284
// /^ registers ^///
285
285
286
286
if ((a & 1 ) && word_mode == wm_word) [[unlikely]] {
287
- if (!peek_only) {
288
- TRACE (" READ-I/O odd address %06o UNHANDLED" , a);
289
- mmu_->trap_if_odd (addr_in, run_mode, space, false );
290
- throw 0 ;
291
- return 0 ;
292
- }
287
+ TRACE (" READ-I/O odd address %06o UNHANDLED" , a);
288
+ mmu_->trap_if_odd (addr_in, run_mode, space, false );
289
+ throw 0 ;
290
+ return 0 ;
293
291
}
294
292
295
293
if (a == ADDR_CPU_ERR) { // cpu error register
296
294
uint16_t temp = mmu_->getCPUERR () & 0xff ;
297
- if (!peek_only) TRACE (" READ-I/O CPU error: %03o" , temp);
295
+ TRACE (" READ-I/O CPU error: %03o" , temp);
298
296
return temp;
299
297
}
300
298
301
299
if (a == ADDR_MAINT) { // MAINT
302
300
uint16_t temp = 1 ; // POWER OK
303
- if (!peek_only) TRACE (" READ-I/O MAINT: %o" , temp);
301
+ TRACE (" READ-I/O MAINT: %o" , temp);
304
302
return temp;
305
303
}
306
304
307
305
if (a == ADDR_CONSW) { // console switch & display register
308
306
uint16_t temp = console_switches;
309
- if (!peek_only) TRACE (" READ-I/O console switch: %o" , temp);
307
+ TRACE (" READ-I/O console switch: %o" , temp);
310
308
return temp;
311
309
}
312
310
@@ -320,13 +318,13 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
320
318
else
321
319
temp = a == ADDR_PIR ? PIR & 255 : PIR >> 8 ;
322
320
323
- if (!peek_only) TRACE (" READ-I/O PIR: %o" , temp);
321
+ TRACE (" READ-I/O PIR: %o" , temp);
324
322
return temp;
325
323
}
326
324
327
325
if (a == ADDR_SYSTEM_ID) {
328
326
uint16_t temp = 011064 ;
329
- if (!peek_only) TRACE (" READ-I/O system id: %o" , temp);
327
+ TRACE (" READ-I/O system id: %o" , temp);
330
328
return temp;
331
329
}
332
330
@@ -335,7 +333,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
335
333
336
334
if (a == ADDR_LP11CSR) { // printer, CSR register, LP11
337
335
uint16_t temp = 0x80 ;
338
- if (!peek_only) TRACE (" READ-I/O LP11 CSR: %o" , temp);
336
+ TRACE (" READ-I/O LP11 CSR: %o" , temp);
339
337
return temp;
340
338
}
341
339
@@ -354,176 +352,166 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
354
352
// /////////
355
353
356
354
if (a >= 0177740 && a <= 0177753 ) { // cache control register and others
357
- if (!peek_only) TRACE (" READ-I/O cache control register/others (%06o): %o" , a, 0 );
355
+ TRACE (" READ-I/O cache control register/others (%06o): %o" , a, 0 );
358
356
// TODO
359
357
return 0 ;
360
358
}
361
359
362
360
if (a >= 0170200 && a <= 0170377 ) { // unibus map
363
- if (!peek_only) TRACE (" READ-I/O unibus map (%06o): %o" , a, 0 );
361
+ TRACE (" READ-I/O unibus map (%06o): %o" , a, 0 );
364
362
// TODO
365
363
return 0 ;
366
364
}
367
365
368
366
if (a >= 0172100 && a <= 0172137 ) { // MM11-LP parity
369
- if (!peek_only) TRACE (" READ-I/O MM11-LP parity (%06o): %o" , a, 1 );
367
+ TRACE (" READ-I/O MM11-LP parity (%06o): %o" , a, 1 );
370
368
return 1 ;
371
369
}
372
370
373
371
if (word_mode == wm_byte) {
374
372
if (a == ADDR_PSW) { // PSW
375
373
uint8_t temp = c->getPSW ();
376
- if (!peek_only) TRACE (" READ-I/O PSW LSB: %03o" , temp);
374
+ TRACE (" READ-I/O PSW LSB: %03o" , temp);
377
375
return temp;
378
376
}
379
377
380
378
if (a == ADDR_PSW + 1 ) {
381
379
uint8_t temp = c->getPSW () >> 8 ;
382
- if (!peek_only) TRACE (" READ-I/O PSW MSB: %03o" , temp);
380
+ TRACE (" READ-I/O PSW MSB: %03o" , temp);
383
381
return temp;
384
382
}
385
383
if (a == ADDR_STACKLIM) { // stack limit register
386
384
uint8_t temp = c->getStackLimitRegister ();
387
- if (!peek_only) TRACE (" READ-I/O stack limit register (low): %03o" , temp);
385
+ TRACE (" READ-I/O stack limit register (low): %03o" , temp);
388
386
return temp;
389
387
}
390
388
if (a == ADDR_STACKLIM + 1 ) { // stack limit register
391
389
uint8_t temp = c->getStackLimitRegister () >> 8 ;
392
- if (!peek_only) TRACE (" READ-I/O stack limit register (high): %03o" , temp);
390
+ TRACE (" READ-I/O stack limit register (high): %03o" , temp);
393
391
return temp;
394
392
}
395
393
396
394
if (a == ADDR_MICROPROG_BREAK_REG) { // microprogram break register
397
395
uint8_t temp = microprogram_break_register;
398
- if (!peek_only) TRACE (" READ-I/O microprogram break register (low): %03o" , temp);
396
+ TRACE (" READ-I/O microprogram break register (low): %03o" , temp);
399
397
return temp;
400
398
}
401
399
if (a == ADDR_MICROPROG_BREAK_REG + 1 ) { // microprogram break register
402
400
uint8_t temp = microprogram_break_register >> 8 ;
403
- if (!peek_only) TRACE (" READ-I/O microprogram break register (high): %03o" , temp);
401
+ TRACE (" READ-I/O microprogram break register (high): %03o" , temp);
404
402
return temp;
405
403
}
406
404
407
405
if (a == ADDR_MMR0) {
408
406
uint8_t temp = mmu_->getMMR0 ();
409
- if (!peek_only) TRACE (" READ-I/O MMR0 LO: %03o" , temp);
407
+ TRACE (" READ-I/O MMR0 LO: %03o" , temp);
410
408
return temp;
411
409
}
412
410
if (a == ADDR_MMR0 + 1 ) {
413
411
uint8_t temp = mmu_->getMMR0 () >> 8 ;
414
- if (!peek_only) TRACE (" READ-I/O MMR0 HI: %03o" , temp);
412
+ TRACE (" READ-I/O MMR0 HI: %03o" , temp);
415
413
return temp;
416
414
}
417
415
}
418
416
else {
419
417
if (a == ADDR_MMR0) {
420
418
uint16_t temp = mmu_->getMMR0 ();
421
- if (!peek_only) TRACE (" READ-I/O MMR0: %06o" , temp);
419
+ TRACE (" READ-I/O MMR0: %06o" , temp);
422
420
return temp;
423
421
}
424
422
425
423
if (a == ADDR_MMR1) { // MMR1
426
424
uint16_t temp = mmu_->getMMR1 ();
427
- if (!peek_only) TRACE (" READ-I/O MMR1: %06o" , temp);
425
+ TRACE (" READ-I/O MMR1: %06o" , temp);
428
426
return temp;
429
427
}
430
428
431
429
if (a == ADDR_MMR2) { // MMR2
432
430
uint16_t temp = mmu_->getMMR2 ();
433
- if (!peek_only) TRACE (" READ-I/O MMR2: %06o" , temp);
431
+ TRACE (" READ-I/O MMR2: %06o" , temp);
434
432
return temp;
435
433
}
436
434
437
435
if (a == ADDR_MMR3) { // MMR3
438
436
uint16_t temp = mmu_->getMMR3 ();
439
- if (!peek_only) TRACE (" READ-I/O MMR3: %06o" , temp);
437
+ TRACE (" READ-I/O MMR3: %06o" , temp);
440
438
return temp;
441
439
}
442
440
443
441
if (a == ADDR_PSW) { // PSW
444
442
uint16_t temp = c->getPSW ();
445
- if (!peek_only) TRACE (" READ-I/O PSW: %06o" , temp);
443
+ TRACE (" READ-I/O PSW: %06o" , temp);
446
444
return temp;
447
445
}
448
446
449
447
if (a == ADDR_STACKLIM) { // stack limit register
450
448
uint16_t temp = c->getStackLimitRegister ();
451
- if (!peek_only) TRACE (" READ-I/O stack limit register: %06o" , temp);
449
+ TRACE (" READ-I/O stack limit register: %06o" , temp);
452
450
return temp;
453
451
}
454
452
455
453
if (a == ADDR_CPU_ERR) { // cpu error register
456
454
uint16_t temp = mmu_->getCPUERR ();
457
- if (!peek_only) TRACE (" READ-I/O CPUERR: %06o" , temp);
455
+ TRACE (" READ-I/O CPUERR: %06o" , temp);
458
456
return temp;
459
457
}
460
458
461
459
if (a == ADDR_MICROPROG_BREAK_REG) { // microprogram break register
462
460
uint16_t temp = microprogram_break_register;
463
- if (!peek_only) TRACE (" READ-I/O microprogram break register: %06o" , temp);
461
+ TRACE (" READ-I/O microprogram break register: %06o" , temp);
464
462
return temp;
465
463
}
466
464
}
467
465
468
- if (tm11 && a >= TM_11_BASE && a < TM_11_END && !peek_only )
466
+ if (tm11 && a >= TM_11_BASE && a < TM_11_END)
469
467
return word_mode == wm_byte ? tm11->read_byte (a) : tm11->read_word (a);
470
468
471
- if (rk05_ && a >= RK05_BASE && a < RK05_END && !peek_only )
469
+ if (rk05_ && a >= RK05_BASE && a < RK05_END)
472
470
return word_mode == wm_byte ? rk05_->read_byte (a) : rk05_->read_word (a);
473
471
474
- if (rl02_ && a >= RL02_BASE && a < RL02_END && !peek_only )
472
+ if (rl02_ && a >= RL02_BASE && a < RL02_END)
475
473
return word_mode == wm_byte ? rl02_->read_byte (a) : rl02_->read_word (a);
476
474
477
- if (tty_ && a >= PDP11TTY_BASE && a < PDP11TTY_END && !peek_only )
475
+ if (tty_ && a >= PDP11TTY_BASE && a < PDP11TTY_END)
478
476
return word_mode == wm_byte ? tty_->read_byte (a) : tty_->read_word (a);
479
477
480
- if (dc11_ && a >= DC11_BASE && a < DC11_END && !peek_only )
478
+ if (dc11_ && a >= DC11_BASE && a < DC11_END)
481
479
return word_mode == wm_byte ? dc11_->read_byte (a) : dc11_->read_word (a);
482
480
483
- if (rp06_ && a >= RP06_BASE && a < RP06_END && !peek_only )
481
+ if (rp06_ && a >= RP06_BASE && a < RP06_END)
484
482
return word_mode == wm_byte ? rp06_->read_byte (a) : rp06_->read_word (a);
485
483
486
484
// LO size register field must be all 1s, so subtract 1
487
485
uint32_t system_size = m->get_memory_size () / 64 - 1 ;
488
486
489
487
if (a == ADDR_SYSSIZE + 2 ) { // system size HI
490
488
uint16_t temp = system_size >> 16 ;
491
- if (!peek_only) TRACE (" READ-I/O accessing system size HI: %06o" , temp);
489
+ TRACE (" READ-I/O accessing system size HI: %06o" , temp);
492
490
return temp;
493
491
}
494
492
495
493
if (a == ADDR_SYSSIZE) { // system size LO
496
494
uint16_t temp = system_size;
497
- if (!peek_only) TRACE (" READ-I/O accessing system size LO: %06o" , temp);
495
+ TRACE (" READ-I/O accessing system size LO: %06o" , temp);
498
496
return temp;
499
497
}
500
498
501
- if (!peek_only) {
502
- TRACE (" READ-I/O UNHANDLED read %08o (%c), (base: %o)" , m_offset, word_mode == wm_byte ? ' B' : ' ' , mmu_->get_io_base ());
499
+ TRACE (" READ-I/O UNHANDLED read %08o (%c), (base: %o)" , m_offset, word_mode == wm_byte ? ' B' : ' ' , mmu_->get_io_base ());
503
500
504
- c->trap (004 ); // no such i/o
505
- throw 1 ;
506
- }
501
+ c->trap (004 ); // no such i/o
502
+ throw 1 ;
507
503
508
504
return -1 ;
509
505
}
510
506
511
507
if ((addr_in & 1 ) && word_mode == wm_word) {
512
- if (peek_only == false ) {
513
- TRACE (" READ from %06o - odd address!" , addr_in);
514
- mmu_->trap_if_odd (addr_in, run_mode, space, false );
515
- throw 2 ;
516
- return 0 ;
517
- }
508
+ TRACE (" READ from %06o - odd address!" , addr_in);
509
+ mmu_->trap_if_odd (addr_in, run_mode, space, false );
510
+ throw 2 ;
511
+ return 0 ;
518
512
}
519
513
520
- // TODO: this will fail for peek & odd addressing
521
514
if (m_offset >= m->get_memory_size ()) {
522
- if (peek_only) {
523
- TRACE (" READ from %06o - out of range!" , addr_in);
524
- return 0 ;
525
- }
526
-
527
515
c->trap (004 ); // no such RAM
528
516
throw 1 ;
529
517
}
@@ -534,7 +522,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
534
522
else
535
523
temp = m->read_word (m_offset);
536
524
537
- if (!peek_only) TRACE (" READ from %06o/%07o %c %c: %06o (%s)" , addr_in, m_offset, space == d_space ? ' D' : ' I' , word_mode == wm_byte ? ' B' : ' W' , temp, mode_selection == rm_prev ? " prev" : " cur" );
525
+ TRACE (" READ from %06o/%07o %c %c: %06o (%s)" , addr_in, m_offset, space == d_space ? ' D' : ' I' , word_mode == wm_byte ? ' B' : ' W' , temp, mode_selection == rm_prev ? " prev" : " cur" );
538
526
539
527
return temp;
540
528
}
@@ -861,12 +849,18 @@ uint16_t bus::read_physical(const uint32_t a)
861
849
862
850
uint16_t bus::read_word (const uint16_t a, const d_i_space_t s)
863
851
{
864
- return read (a, wm_word, rm_cur, false , s);
852
+ return read (a, wm_word, rm_cur, s);
865
853
}
866
854
867
- uint16_t bus::peek_word (const uint16_t a)
855
+ uint16_t bus::peek_word (const int run_mode, const uint16_t a)
868
856
{
869
- return read (a, wm_word, rm_cur, true );
857
+ auto meta = mmu_->calculate_physical_address (run_mode, a);
858
+
859
+ uint32_t io_base = mmu_->get_io_base ();
860
+ if (meta.physical_instruction >= io_base) // TODO: I/O always returns 0xffff
861
+ return 0xffff ;
862
+
863
+ return m->read_word (meta.physical_instruction );
870
864
}
871
865
872
866
void bus::write_word (const uint16_t a, const uint16_t value, const d_i_space_t s)
0 commit comments