v0.0.7

Microcontroller:

• Change part numbers to better align with JLCPCB stock, simplify assembly
• Fix clear signal in SRAM address counter
• Fix rotation of U8, U9, U13
• Change the 2x4x4 register files (CD74HC670M96) to 2x8-bit latches (SN74AHC373PWR), which JLCPCB currently has in stock
• The new register hardware required us to change the address decoding and the actual addresses of the registers 0xA13000/0xA13002 => 0xA13010/0xA13012
• Add debug pads

Cart:

• Fix footprint and rotation for SMT regulator

SRAM Bank:

• Fix rotation of PSRAM
• Correct SRAM debug pads

v0.0.6

Microcontroller:

• Update microcontroller board setup
• Redesign address decoders (verified on breadboard)
• Consolidate buffer ICs in register file
• Replace ethernet module with pin header for Ethernet featherwing
• Replace address counters with larger ones that are easier/cheaper to assemble
• Reduce BOM:
  • Remove unnecessary level shifter
  • Replace 74LV1T125 (1 buffer IC) with 74LVC2G125 (2 buffer IC) that we
    already used
  • Replace NAND gate with another address decoder
• Stabilize control signals by making sure SEGA_CONTROL and UC_CONTROL can
  never be active at once (one does not depend on the other)
• Change part number for flip-flops to one that JLCPCB stocks

Cart:

• Fix missing ground fill
• Let JLCPCB populate the base pin header
• Switch regulator for SMD version that JLCPCB can populate
• Move components for easier routing, easier access to ammeter header
• Add explanatory text in the silkscreen for each section of the PCB

SRAM:

• Add test pads to SRAM board

Firmware:

• Show async HTTP fetches with the builtin LED
• Improve debugging
• Fix pulse timing

Software:

• Fix reading of 1-bit ports (verified on breadboard)
• Fix initial error flag state

Docs:

• Add missing notes to hardware README

v0.0.5

Hardware:

• Automate rotation fixes for JLCPCB
• Fix mistakes from v0.0.2 cart board:
  • Fix address decoder output (Y0, not Y7)
  • Fix level-shifter direction for data (was backwards before)
  • Fix debug pad access to signals (level-shifters should use the
    internal signal, not the external one)
  • Avoid traces too close to the debug pads, since they can be cut
    accidentally
• Add additional debug pads for both raw and level-shifted signals
• Add debug pad and pin header for measuring current consumption
• Replace bulk capacitor with SMD version
• Remove pin headers that didn't turn out to be useful

Encoder:

• Add more format details to documentation
• Filter audio to improve quality at low sample rate and normalize volume

Software:

• Fix menu font alignment
• Fix edge case playback failure with 2 frames in final chunk

Firmware:

• Fix HTTP speed tests

Emulators:

• Fix emulator timing issues

Workflows:

• Control artifact usage, reduce costs while this repo is still private
• Fix PR update in schematic workflow

v0.0.4

• New metadata header and catalog format with thumbnails
• New menu with thumbnails and logo and better error reporting
• Simplified streaming/chunk format
• Full internet streaming implementation in emulator without canned videos
• Improved menu font
• Full firmware implementation
• Many fixes related to error handling
• Improve release artifacts for encoder
• New internal macros for simplified testing and development

v0.0.3

• Add demo ROMs to releases
• Add encoder to releases
• Silence bogus warning in player about unaligned member access
• Reorganize software and firmware folders

v0.0.2

My second board order from JLCPCB. The first predated the release automation.

This fixes (hopefully) several issues with the first order, including:
- Add debug connectors (not populated by default) for power and flash control signals
- Fix flash ~OE signal, which is mutually exclusive with ~WE
- Fix level translators for compatibility with both 3.3V and 5V logic
- Replace decoder with a smaller, simpler one with no latches and 5V-tolerance
- Reorient translators to simplify traces
- Increase trace width for supply traces

See also c450b81