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ecnelisesecnelises
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[PowerPC] Update chain uses when emitting lxsizx (#84892)
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‎llvm/lib/Target/PowerPC/PPCISelLowering.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -15048,6 +15048,7 @@ SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
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SDValue Ld = DAG.getMemIntrinsicNode(PPCISD::LXSIZX, dl,
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DAG.getVTList(MVT::f64, MVT::Other),
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Ops, MVT::i8, LDN->getMemOperand());
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DAG.makeEquivalentMemoryOrdering(LDN, Ld);
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// For signed conversion, we need to sign-extend the value in the VSR
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if (Signed) {

‎llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll

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Original file line numberDiff line numberDiff line change
@@ -7281,3 +7281,61 @@ entry:
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store double %str, ptr inttoptr (i64 1000000000000 to ptr), align 4096
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ret void
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}
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define dso_local void @st_reversed_double_from_i8(ptr %ptr) {
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; CHECK-P10-LABEL: st_reversed_double_from_i8:
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; CHECK-P10: # %bb.0: # %entry
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; CHECK-P10-NEXT: li r4, 8
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; CHECK-P10-NEXT: lxsibzx f0, 0, r3
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; CHECK-P10-NEXT: xxspltidp vs2, -1023410176
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; CHECK-P10-NEXT: lxsibzx f1, r3, r4
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; CHECK-P10-NEXT: xscvuxddp f0, f0
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; CHECK-P10-NEXT: xscvuxddp f1, f1
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; CHECK-P10-NEXT: xsadddp f0, f0, f2
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; CHECK-P10-NEXT: xsadddp f1, f1, f2
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; CHECK-P10-NEXT: stfd f1, 0(r3)
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; CHECK-P10-NEXT: stfd f0, 8(r3)
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; CHECK-P10-NEXT: blr
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;
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; CHECK-P9-LABEL: st_reversed_double_from_i8:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: li r4, 8
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; CHECK-P9-NEXT: lxsibzx f0, 0, r3
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; CHECK-P9-NEXT: lxsibzx f1, r3, r4
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; CHECK-P9-NEXT: addis r4, r2, .LCPI300_0@toc@ha
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; CHECK-P9-NEXT: lfs f2, .LCPI300_0@toc@l(r4)
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; CHECK-P9-NEXT: xscvuxddp f0, f0
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; CHECK-P9-NEXT: xscvuxddp f1, f1
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; CHECK-P9-NEXT: xsadddp f0, f0, f2
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; CHECK-P9-NEXT: xsadddp f1, f1, f2
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; CHECK-P9-NEXT: stfd f0, 8(r3)
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; CHECK-P9-NEXT: stfd f1, 0(r3)
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; CHECK-P9-NEXT: blr
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;
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; CHECK-P8-LABEL: st_reversed_double_from_i8:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: lbz r4, 0(r3)
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; CHECK-P8-NEXT: lbz r5, 8(r3)
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; CHECK-P8-NEXT: mtfprwz f0, r4
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; CHECK-P8-NEXT: mtfprwz f1, r5
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; CHECK-P8-NEXT: addis r4, r2, .LCPI300_0@toc@ha
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; CHECK-P8-NEXT: lfs f2, .LCPI300_0@toc@l(r4)
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; CHECK-P8-NEXT: xscvuxddp f0, f0
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; CHECK-P8-NEXT: xscvuxddp f1, f1
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; CHECK-P8-NEXT: xsadddp f0, f0, f2
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; CHECK-P8-NEXT: xsadddp f1, f1, f2
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; CHECK-P8-NEXT: stfd f1, 0(r3)
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; CHECK-P8-NEXT: stfd f0, 8(r3)
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; CHECK-P8-NEXT: blr
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entry:
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%idx = getelementptr inbounds i8, ptr %ptr, i64 8
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%i0 = load i8, ptr %ptr, align 1
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%i1 = load i8, ptr %idx, align 1
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%f0 = uitofp i8 %i0 to double
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%f1 = uitofp i8 %i1 to double
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%a0 = fadd double %f0, -1.280000e+02
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%a1 = fadd double %f1, -1.280000e+02
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store double %a1, ptr %ptr, align 8
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store double %a0, ptr %idx, align 8
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ret void
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}

‎llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll

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Original file line numberDiff line numberDiff line change
@@ -7271,3 +7271,61 @@ entry:
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store double %conv, ptr inttoptr (i64 1000000000000 to ptr), align 4096
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ret void
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}
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define dso_local void @st_reversed_float_from_i8(ptr %ptr) {
7276+
; CHECK-P10-LABEL: st_reversed_float_from_i8:
7277+
; CHECK-P10: # %bb.0: # %entry
7278+
; CHECK-P10-NEXT: li r4, 8
7279+
; CHECK-P10-NEXT: lxsibzx f0, 0, r3
7280+
; CHECK-P10-NEXT: xxspltidp vs2, -1023410176
7281+
; CHECK-P10-NEXT: lxsibzx f1, r3, r4
7282+
; CHECK-P10-NEXT: xscvuxdsp f0, f0
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; CHECK-P10-NEXT: xscvuxdsp f1, f1
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; CHECK-P10-NEXT: xsaddsp f0, f0, f2
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; CHECK-P10-NEXT: xsaddsp f1, f1, f2
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; CHECK-P10-NEXT: stfs f0, 8(r3)
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; CHECK-P10-NEXT: stfs f1, 0(r3)
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; CHECK-P10-NEXT: blr
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;
7290+
; CHECK-P9-LABEL: st_reversed_float_from_i8:
7291+
; CHECK-P9: # %bb.0: # %entry
7292+
; CHECK-P9-NEXT: li r4, 8
7293+
; CHECK-P9-NEXT: lxsibzx f0, 0, r3
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; CHECK-P9-NEXT: lxsibzx f1, r3, r4
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; CHECK-P9-NEXT: addis r4, r2, .LCPI300_0@toc@ha
7296+
; CHECK-P9-NEXT: lfs f2, .LCPI300_0@toc@l(r4)
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; CHECK-P9-NEXT: xscvuxdsp f0, f0
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; CHECK-P9-NEXT: xscvuxdsp f1, f1
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; CHECK-P9-NEXT: xsaddsp f0, f0, f2
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; CHECK-P9-NEXT: xsaddsp f1, f1, f2
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; CHECK-P9-NEXT: stfs f0, 8(r3)
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; CHECK-P9-NEXT: stfs f1, 0(r3)
7303+
; CHECK-P9-NEXT: blr
7304+
;
7305+
; CHECK-P8-LABEL: st_reversed_float_from_i8:
7306+
; CHECK-P8: # %bb.0: # %entry
7307+
; CHECK-P8-NEXT: lbz r4, 0(r3)
7308+
; CHECK-P8-NEXT: lbz r5, 8(r3)
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; CHECK-P8-NEXT: mtfprwz f0, r4
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; CHECK-P8-NEXT: mtfprwz f1, r5
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; CHECK-P8-NEXT: addis r4, r2, .LCPI300_0@toc@ha
7312+
; CHECK-P8-NEXT: lfs f2, .LCPI300_0@toc@l(r4)
7313+
; CHECK-P8-NEXT: xscvuxdsp f0, f0
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; CHECK-P8-NEXT: xscvuxdsp f1, f1
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; CHECK-P8-NEXT: xsaddsp f0, f0, f2
7316+
; CHECK-P8-NEXT: xsaddsp f1, f1, f2
7317+
; CHECK-P8-NEXT: stfs f1, 0(r3)
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; CHECK-P8-NEXT: stfs f0, 8(r3)
7319+
; CHECK-P8-NEXT: blr
7320+
entry:
7321+
%idx = getelementptr inbounds i8, ptr %ptr, i64 8
7322+
%i0 = load i8, ptr %ptr, align 1
7323+
%i1 = load i8, ptr %idx, align 1
7324+
%f0 = uitofp i8 %i0 to float
7325+
%f1 = uitofp i8 %i1 to float
7326+
%a0 = fadd float %f0, -1.280000e+02
7327+
%a1 = fadd float %f1, -1.280000e+02
7328+
store float %a1, ptr %ptr, align 8
7329+
store float %a0, ptr %idx, align 8
7330+
ret void
7331+
}

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