Board Layout

TI: High-Speed Layout Guidelines

From Rerouter's post at EEBlog

For low-speed analog circuits, I try and break away the ground and power rails right at the regulation point (the feedback point in your local regulation) as that means feedback action will reduce any of low-frequency noise most effectively for that point,

For digital segments, I try and box the noise in by using LC filters on its positive supply rails, as for its ground supply, respect both path of least resistance and path of least impedance, any fast edges current will want to flow on the ground plane directly underneath the signal trace, but some of it will still follow the path of least resistance, which if it overlaps something sensitive may require some careful thinking.

The other golden bit of layout I near religiously try and do is group by function, it makes things prettier, but in most cases, it lets you shrink the size of the current loop, if you ever look into switch-mode converter layout, one of the goals is to keep your current loops small to reduce the inductance and reduce the amplitude of any radiated noise, similar things should be observed if any of your digital signals have an appreciable current behind it,

To take this a little further thinking of every trace ground plane included as a resistance, and every current as having both a signal and a return path gets you in the right mindset for how to best possibly layout your circuits for minimal complications,