-
Notifications
You must be signed in to change notification settings - Fork 27
/
xtrx.c
2344 lines (2021 loc) · 65.6 KB
/
xtrx.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* xtrx high level source file
* Copyright (c) 2018 Sergey Kostanbaev <sergey.kostanbaev@fairwaves.co>
* For more information, please visit: http://xtrx.io
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <xtrxll_port.h>
#include "xtrx_api.h"
#include <xtrxll_api.h>
#include <xtrxll_mmcm.h>
#include <stdlib.h>
#include <string.h>
#include <assert.h>
#include <inttypes.h>
#include <xtrxdsp.h>
#include <xtrxdsp_filters.h>
#include <xtrxll_log.h>
#include "xtrx_fe.h"
#include "xtrx_debug.h"
#define MAX(x,y) (((x) > (y)) ? (x) : (y))
enum {
MAX_LMS = 1,
DEF_BUFSIZE = 32768,
DEF_TX_BUFSIZE = DEF_BUFSIZE,
};
struct xtrx_multill_stream {
bool run;
void* buf;
size_t buf_total;
size_t buf_processed; /**< Number of processed samples (total for all channels) in the cached buffer */
uint64_t buf_processed_ts; /**< Number of samples (total for all channels) in the cached buffer */
uint64_t buf_ts; /**< First sample number in the cached buffer */
uint64_t buf_conv_state;
unsigned buf_len_iq_symbol;
unsigned buf_len_iq_host_sym;
unsigned chans_in_stream; /**< Number of logical channels multiplexed into the device stream */
float scale_16;
xtrx_host_format_t hostfmt;
xtrx_wire_format_t busfmt;
xtrxll_fe_t fefmt;
};
struct xtrx_dev {
unsigned dev_idx; //Index of the DEVICE structure in an array
unsigned dev_max; //Total number of linked XTRX devices
struct xtrxll_dev* lldev;
struct xtrx_fe_obj* fe;
xtrx_debug_ctx_t* debugif;
unsigned refclock;
xtrx_clock_source_t clock_source;
bool refclock_checked;
char rxinit;
xtrx_host_format_t rx_hostfmt;
xtrx_wire_format_t rx_busfmt;
xtrxll_fe_t rx_fefmt;
uint64_t rx_samples; /* num of RX samples for both channels in MIMO or signle channel is SISO */
float rx_scale_16;
void* rxbuf;
unsigned rxbuf_total;
unsigned rxbuf_processed; /**< Number of processed bytes (total for all channels) in the cached buffer */
uint64_t rxbuf_processed_ts; /**< Number of samples (in each device channel) in the cached buffer */
uint64_t rxbuf_ts; /**< First sample number in the cached buffer */
uint64_t rxbuf_conv_state;
unsigned rxbuf_len_iq_symbol;
unsigned rxbuf_len_iq_host_sym;
bool rx_run;
unsigned rx_chans_in_stream; /**< Number of logical channels multiplexed into the device stream */
char txinit;
xtrx_host_format_t tx_hostfmt;
xtrx_wire_format_t tx_busfmt;
xtrxll_fe_t tx_fefmt;
float tx_scale_16;
void* txbuf;
unsigned txbuf_total;
unsigned txbuf_processed; /** Number of processed bytes (total for all channels) in the cached buffer */
uint64_t txbuf_processed_ts; /** Number of samples (in each device channel) in the cached buffer */
uint64_t txbuf_conv_state;
unsigned txbuf_len_iq_symbol;
unsigned txbuf_len_iq_host_sym;
unsigned txburt_late_prev;
uint64_t txskip_time;
bool tx_run;
unsigned tx_chans_in_stream;
unsigned tx_pkt_samples;
double tx_bandwidth;
double rx_bandwidth;
xtrxdsp_filter_state_t rx_host_filter[2]; /* For A & B channels */
xtrxdsp_filter_state_t tx_host_filter[2]; /* For A & B channels */
unsigned tx_host_inter; /* Interpolation on HOST */
unsigned rx_host_decim; /* Decimation on HOST */
unsigned gpio_cfg_funcs;
unsigned gpio_cfg_dir;
master_ts gtime_start;
};
static const char* _devname(struct xtrx_dev* dev)
{
return xtrxll_get_name(dev->lldev);
}
enum xtrx_reg_idxs {
OSCLATCH = 0,
RXTIME = 1,
TXTIME = 2,
GTIME = 3,
GT_OFF = 4,
};
static int _debug_param_io(void* obj, unsigned param, unsigned chno, uint64_t val, uint64_t* oval)
{
int res = -EINVAL;
int tmp;
struct xtrx_dev* dev = (struct xtrx_dev*)obj;
xtrx_channel_t xch = (XTRX_CH_A << chno);
unsigned devno = (chno >> 1);
if (devno >= dev->dev_max) {
XTRXLLS_LOG("XTRX", XTRXLL_WARNING, "Incorrect device channel: %d\n", chno);
return -EINVAL;
}
XTRXLLS_LOG("XTRX", XTRXLL_WARNING, "%s: DEBUG: %x %x %lx\n",
_devname(&dev[devno]), param, chno, val);
switch (param) {
case DEBUG_RFIC_SPI_WR:
return xtrx_val_set(dev, XTRX_TRX, xch,
(xtrx_val_t)(XTRX_RFIC_REG_0 + ((val >> 16) & 0x7fff)),
val & 0xffff);
case DEBUG_RFIC_SPI_RD:
return xtrx_val_get(dev, XTRX_TRX, xch,
(xtrx_val_t)(XTRX_RFIC_REG_0 + ((val >> 16) & 0x7fff)),
oval);
case DEBUG_GET_REFCLK:
*oval = (unsigned)dev[devno].refclock;
return 0;
case DEBUG_BOARD_TEMP:
res = xtrxll_get_sensor(dev[devno].lldev, 0, &tmp);
XTRXLLS_LOG("XTRX", XTRXLL_INFO, "%s: Temp %.1f C\n",
_devname(&dev[devno]), (double)tmp/256);
*oval = (unsigned)tmp;
return res;
case DEBUG_BOARD_DAC:
if (oval) {
res = xtrxll_get_sensor(dev[devno].lldev, XTRXLL_DAC_REG, &tmp);
if (res)
return res;
*oval = (unsigned)tmp;
XTRXLLS_LOG("XTRX", XTRXLL_INFO, "%s: DAC: %d\n",
_devname(&dev[devno]), tmp);
}
if (val > 0) {
res = xtrxll_set_param(dev[devno].lldev, XTRXLL_PARAM_REF_DAC, val);
}
return res;
case DEBUG_ANT_RX:
if (val != UINT_MAX) {
return dev[devno].fe->ops->set_reg(dev[devno].fe, 0, XTRX_TRX, XTRX_FE_CUSTOM_0, val);
} else {
return dev[devno].fe->ops->get_reg(dev[devno].fe, 0, XTRX_TRX, XTRX_FE_CUSTOM_0, oval);
}
case DEBUG_ANT_TX:
if (val != UINT_MAX) {
return dev[devno].fe->ops->set_reg(dev[devno].fe, 0, XTRX_TRX, XTRX_FE_CUSTOM_0 + 1, val);
} else {
return dev[devno].fe->ops->get_reg(dev[devno].fe, 0, XTRX_TRX, XTRX_FE_CUSTOM_0 + 1, oval);
}
case DEBUG_GET_DEVICES:
*oval = dev->dev_max; return 0;
case DEBUG_GET_RXIQ_ODD:
res = xtrxll_get_sensor(dev[devno].lldev, XTRXLL_TEST_CNT_RXIQ_MALGN, &tmp);
*oval = tmp;
return res;
case DEBUG_GET_RXIQ_MISS:
res = xtrxll_get_sensor(dev[devno].lldev, XTRXLL_TEST_CNT_RXIQ_MALGN, &tmp);
*oval = tmp;
return res;
case DEBUG_VIO:
if (oval) {
res = xtrxll_get_sensor(dev[devno].lldev, XTRXLL_XTRX_VIO, &tmp);
if (res)
return res;
*oval = (unsigned)tmp;
}
if (val > 0) {
res = xtrxll_set_param(dev[devno].lldev, XTRXLL_PARAM_PWR_VIO, val);
}
return res;
case DEBUG_V33:
if (oval) {
res = xtrxll_get_sensor(dev[devno].lldev, XTRXLL_XTRX_VGPIO, &tmp);
if (res)
return res;
*oval = (unsigned)tmp;
}
if (val > 0) {
res = xtrxll_set_param(dev[devno].lldev, XTRXLL_PARAM_PWR_VGPIO, val);
}
return res;
case DEBUG_FGP_CTRL:
if (oval) {
res = xtrxll_get_sensor(dev[devno].lldev, XTRXLL_EXT_CLK, &tmp);
if (res)
return res;
*oval = (unsigned)tmp;
}
if (val != UINT_MAX) {
res = xtrxll_set_param(dev[devno].lldev, XTRXLL_PARAM_EXT_CLK, val);
}
return res;
case DEBUG_XTRX_GET_REG: {
uint32_t d[2];
unsigned llreg;
switch (val) {
case OSCLATCH: llreg = XTRXLL_OSC_LATCHED; break;
case RXTIME: llreg = XTRXLL_RX_TIME; break;
case TXTIME: llreg = XTRXLL_TX_TIME; break;
case GTIME: llreg = XTRXLL_GTIME_SECFRAC; break;
case GT_OFF: llreg = XTRXLL_GTIME_OFF; break;
default:
return -EINVAL;
}
res = xtrxll_get_sensor(dev[devno].lldev, llreg, (int*)&d[0]);
if (res)
return res;
if (val == GTIME) {
uint64_t v = (uint64_t)d[0] * 1000000000UL + (uint64_t)d[1];
*oval = v;
} else {
*oval = d[0];
}
return res;
}
default:
XTRXLLS_LOG("XTRX", XTRXLL_WARNING, "%s: Unknown CMDIDX:%x\n",
_devname(&dev[devno]), param);
}
return -EINVAL;
}
static const struct xtrx_debug_ops _debug_ops = {
_debug_param_io,
};
int xtrx_discovery(xtrx_device_info_t* devs, size_t maxbuf)
{
int res, i;
xtrxll_device_info_t lldevs[maxbuf];
res = xtrxll_discovery(lldevs, maxbuf);
if (res < 0)
return res;
for (i = 0; i < res; i++) {
strncpy(devs[i].uniqname, lldevs[i].uniqname, sizeof(devs[i].uniqname));
strncpy(devs[i].proto, lldevs[i].proto, sizeof(lldevs[i].proto));
strncpy(devs[i].speed, lldevs[i].busspeed, sizeof(lldevs[i].busspeed));
strncpy(devs[i].serial, "", sizeof(devs[i].serial)); // TODO
strncpy(devs[i].devid, lldevs[i].addr, sizeof(devs[i].devid));
}
return res;
}
int xtrx_open(const char* device, unsigned flags, struct xtrx_dev** outdev)
{
struct xtrxll_dev* lldev;
struct xtrx_dev* dev;
int res;
int loglevel;
loglevel = flags & XTRX_O_LOGLVL_MASK;
xtrxll_set_loglevel(loglevel);
res = xtrxll_open(device, 0, &lldev);
if (res)
goto failed_openll;
dev = (struct xtrx_dev*)malloc(sizeof(struct xtrx_dev));
if (dev == NULL) {
res = -errno;
goto failed_mem;
}
memset(dev, 0, sizeof(struct xtrx_dev));
dev->dev_idx = 0;
dev->dev_max = 1;
dev->lldev = lldev;
dev->refclock = 0;
dev->refclock_checked = false;
dev->clock_source = XTRX_CLKSRC_INT;
xtrxdsp_init();
res = xtrx_fe_init(dev, lldev, flags, NULL, &dev->fe);
if (res) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: Failed to initialize frontend: err=%d\n",
_devname(dev), res);
goto failed_fe;
}
res = xtrx_debug_init(NULL, &_debug_ops, dev, &dev->debugif);
if (res) {
XTRXLLS_LOG("XTRX", XTRXLL_WARNING, "%s: Failed to initialize debug service: err=%d, debug service is disabled\n",
_devname(dev), res);
dev->debugif = NULL;
}
*outdev = dev;
return 0;
failed_fe:
free(dev);
failed_mem:
xtrxll_close(lldev);
failed_openll:
return res;
}
enum {
XTRX_DEVS_MAX = 32
};
int xtrx_open_multi(const xtrx_open_multi_info_t *dinfo, struct xtrx_dev** outdev)
{
int res;
int loglevel = dinfo->loglevel;
if (loglevel >= 0) {
xtrxll_set_loglevel(loglevel);
}
if (dinfo->devcount > XTRX_DEVS_MAX || dinfo->devcount == 0) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "Incorrect number of XTRXes in the multidevice: %d!\n",
dinfo->devcount);
return -EINVAL;
}
struct xtrxll_dev* lldev[XTRX_DEVS_MAX];
for (unsigned num = 0; num < dinfo->devcount; num++) {
res = xtrxll_open(dinfo->devices[num], XTRXLL_FULL_DEV_MATCH, &lldev[num]);
if (res) {
for (; num > 0; num--) {
xtrxll_close(lldev[num - 1]);
}
return res;
}
}
xtrxdsp_init();
//All devices are claimed
struct xtrx_dev* dev = (struct xtrx_dev*)malloc(sizeof(struct xtrx_dev) * dinfo->devcount);
if (dev == NULL) {
res = -errno;
goto failed_mem;
}
memset(dev, 0, sizeof(struct xtrx_dev) * dinfo->devcount);
for (unsigned num = 0; num < dinfo->devcount; num++) {
dev[num].dev_idx = num;
dev[num].dev_max = dinfo->devcount;
dev[num].lldev = lldev[num];
dev[num].refclock = 0;
dev[num].clock_source = XTRX_CLKSRC_INT;
dev[num].fe = dev[0].fe;
res = xtrx_fe_init(&dev[num], lldev[num],
(num == 0 ? XTRX_FE_MASTER : 0) | num,
(dinfo->flags & XTRX_OMI_FE_SET) ? dinfo->frontend : NULL,
&dev[num].fe);
if (res) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: Failed to initialize frontend: err=%d on dev %d/%d\n",
_devname(dev), res, num, dinfo->devcount);
for (; num > 0; num--) {
dev[num - 1].fe->ops->fe_deinit(dev[num - 1].fe);
}
goto failed_fe;
}
}
if (dinfo->flags & XTRX_OMI_DEBUGIF) {
res = xtrx_debug_init(NULL, &_debug_ops, dev, &dev->debugif);
if (res) {
XTRXLLS_LOG("XTRX", XTRXLL_WARNING, "%s: Failed to initialize debug service: err=%d\n",
_devname(dev), res);
goto failed_fe;
}
}
*outdev = dev;
return 0;
failed_fe:
free(dev);
failed_mem:
for (unsigned num = 0; num < dinfo->devcount; num++) {
xtrxll_close(lldev[num]);
}
return res;
}
int xtrx_open_string(const char* paramstring, struct xtrx_dev** dev)
{
int res;
char copypstr[4096];
char* str;
char* saveptr;
char* ldevices[XTRX_DEVS_MAX] = {0};
char* devices = NULL;
char* flags = NULL;
xtrxll_log_initialize(NULL);
xtrx_open_multi_info_t params;
memset(¶ms, 0, sizeof(params));
params.loglevel = -1;
params.devcount = 1;
params.devices = (const char**)ldevices;
if (paramstring) {
strncpy(copypstr, paramstring, sizeof(copypstr) - 1);
copypstr[sizeof(copypstr) - 1] = '\0';
devices = copypstr;
char* separator = strstr(copypstr, ";;");
if (devices == separator) {
devices = NULL;
}
if (separator) {
*separator = 0;
separator += 2;
if (*separator != 0) {
flags = separator;
}
}
}
if (flags) {
for (str = flags; ; str = NULL) {
char* token = strtok_r(str, ";", &saveptr);
if (token == NULL)
break;
char* eq = strchr(token, '=');
char* val = NULL;
if (eq) {
*eq = 0;
val = eq + 1;
if (*val == 0)
val = NULL;
}
if (strcmp(token, "loglevel") == 0) {
if (val != NULL) {
params.loglevel = atoi(val) & XTRX_O_LOGLVL_MASK;
xtrxll_set_loglevel(params.loglevel);
}
} else if (strcmp(token, "fe") == 0) {
params.frontend = val;
params.flags |= XTRX_OMI_FE_SET;
} else if (strcmp(token, "debug") == 0) {
params.flags |= XTRX_OMI_DEBUGIF;
} else {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR,
"xtrx_open(): unknown flag '%s' with value '%s'\n",
token, val);
}
}
}
if (devices) {
int j;
for (j = 0, str = devices; j < XTRX_DEVS_MAX; j++, str = NULL) {
char* token = strtok_r(str, ";", &saveptr);
if (token == NULL)
break;
ldevices[j] = token;
XTRXLLS_LOG("XTRX", XTRXLL_INFO, "xtrx_open(): dev[%d]='%s'\n",
j, ldevices[j]);
}
if (j == 0) {
XTRXLLS_LOG("XTRX", XTRXLL_INFO, "xtrx_open(): no devices were found\n");
return -ENOENT;
}
params.devcount = j;
}
res = xtrx_open_multi(¶ms, dev);
if (res)
return res;
return params.devcount;
}
void xtrx_close(struct xtrx_dev* dev)
{
if (dev->debugif) {
xtrx_debug_free(dev->debugif);
}
for (unsigned devnum = 0; devnum < dev->dev_max; devnum++) {
dev[devnum].fe->ops->fe_deinit(dev[devnum].fe);
xtrxll_close(dev[devnum].lldev);
}
free(dev);
}
int xtrx_set_ref_clk(struct xtrx_dev* dev, unsigned refclkhz, xtrx_clock_source_t clksrc)
{
int res;
static const unsigned base_refclk_ch[] = { 10000000, 19200000, 26000000, 30720000, 38400000, 40000000 };
static const unsigned base_refclk_ch_cnt = (unsigned)(sizeof(base_refclk_ch) / sizeof(base_refclk_ch[0]));
enum {
REF_MIN = 10000000,
REF_MAX = 52000000,
PPM_LIMIT = 10000,
};
if ((refclkhz < REF_MIN && refclkhz != 0) || refclkhz > REF_MAX) {
XTRXLLS_LOG("XTRX", XTRXLL_WARNING, "%s: RefClk %d is out of range [%d;%d]!\n",
_devname(dev), refclkhz, REF_MIN, REF_MAX);
return -EINVAL;
}
for (unsigned devnum = 0; devnum < dev->dev_max; devnum++) {
dev[devnum].clock_source = clksrc;
res = xtrxll_set_param(dev[devnum].lldev,
XTRXLL_PARAM_EXT_CLK,
(dev[devnum].clock_source) ? XTRXLL_CLK_EXT_NOPD : XTRXLL_CLK_INT);
if (res) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: Unable to set clock source\n",
_devname(&dev[devnum]));
return res;
}
}
if (dev->refclock < 1) {
const unsigned* base_refclk = (refclkhz > 0) ? &refclkhz : base_refclk_ch;
unsigned base_refclk_cnt = (refclkhz > 0) ? 1 : base_refclk_ch_cnt;
int osc;
res = xtrxll_get_sensor(dev->lldev, XTRXLL_REFCLK_CLK, &osc);
if (res) {
return res;
}
dev->refclock_checked = false;
for (unsigned i = 0; i < base_refclk_cnt; i++) {
int diff = (int)base_refclk[i] - osc;
if (abs(diff) * (int64_t)(1000000/PPM_LIMIT) / base_refclk[i] < 1) {
dev->refclock = base_refclk[i];
dev->refclock_checked = true;
XTRXLLS_LOG("XTRX", XTRXLL_INFO, "%s: Set %s RefClk to %d based on %d measurement\n",
_devname(dev),
(dev->clock_source) ? "EXT" : "INT",
(int)dev->refclock, osc);
// Pass it down to the RF FE
res = dev->fe->ops->fe_set_refclock(dev->fe, dev->refclock);
if (res)
return res;
break;
}
}
if (!dev->refclock_checked) {
XTRXLLS_LOG("XTRX", XTRXLL_INFO, "%s: Wierd RefClk %d! set RefClk manually\n",
_devname(dev), osc);
return -ENOENT;
}
}
for (unsigned devnum = 1; devnum < dev->dev_max; devnum++) {
int osc;
res = xtrxll_get_sensor(dev[devnum].lldev, XTRXLL_REFCLK_CLK, &osc);
if (res) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: Unable to get OSC VAL (%d)\n",
_devname(&dev[devnum]), res);
return res;
}
if (abs((int)dev->refclock - osc) * (int64_t)(1000000/PPM_LIMIT) / dev->refclock > 1) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: RefClk %d doesn't look like %d on master!\n",
_devname(&dev[devnum]), osc, (int)dev->refclock);
dev->refclock = 0;
dev->refclock_checked = false;
return -EIO;
}
dev[devnum].refclock = dev->refclock;
dev[devnum].refclock_checked = dev->refclock_checked;
// Pass it down to the RF FE
res = dev[devnum].fe->ops->fe_set_refclock(dev[devnum].fe, dev->refclock);
if (res)
return res;
}
XTRXLLS_LOG("XTRX", XTRXLL_DEBUG, "%s: Set RefClk to %d Hz %s\n",
_devname(dev),
(int)dev->refclock, (dev->clock_source == XTRX_CLKSRC_INT) ? "internal" : "extarnal");
return 0;
}
int xtrx_set_samplerate(struct xtrx_dev* dev,
double cgen_rate,
double rxrate,
double txrate,
unsigned flags,
double *actualcgen,
double* actualrx,
double* actualtx)
{
int res = 0;
if (!dev->refclock_checked) {
res = xtrx_set_ref_clk(dev, 0, dev->clock_source);
if (res)
return res;
}
int hwid;
res = xtrxll_get_sensor(dev->lldev, XTRXLL_HWID, &hwid);
if (res) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: unable to get HWID\n", _devname(dev));
return res;
}
// Check that other boards have the same settings
for (unsigned devnum = 1; devnum < dev->dev_max; devnum++) {
int nhwid;
res = xtrxll_get_sensor(dev[devnum].lldev, XTRXLL_HWID, &nhwid);
if (res) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: unable to get HWID\n",
_devname(&dev[devnum]));
return res;
}
if (nhwid != hwid) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: board HWID: %08x != %08x on master board\n",
_devname(&dev[devnum]), nhwid, hwid);
return -EIO;
}
}
struct xtrx_fe_samplerate inrates, outrates;
memset(&inrates, 0, sizeof(inrates));
memset(&outrates, 0, sizeof(outrates));
inrates.adc.rate = rxrate;
inrates.adc.hwrate = (rxrate > 0) ? cgen_rate / 4 : 0;
inrates.adc.refclk = dev->refclock;
inrates.dac.rate = txrate;
inrates.dac.hwrate = (txrate > 0) ? cgen_rate / 4 : 0;
inrates.dac.refclk = dev->refclock;
inrates.flags = flags;
inrates.hwid = hwid;
inrates.refclk_source = dev->clock_source;
for (unsigned devnum = 0; devnum < dev->dev_max; devnum++) {
res = dev[devnum].fe->ops->dd_set_samplerate(dev[devnum].fe, &inrates, &outrates);
if (res)
return res;
dev[devnum].rx_host_decim = outrates.adc.host_di;
dev[devnum].tx_host_inter = outrates.dac.host_di;
}
if (actualcgen) {
*actualcgen = MAX(outrates.adc.hwrate * 4, outrates.dac.hwrate * 4);
}
if (actualrx) {
*actualrx = outrates.adc.rate;
}
if (actualtx) {
*actualtx = outrates.dac.rate;
}
return res;
}
int xtrx_tune(struct xtrx_dev* dev, xtrx_tune_t type, double freq,
double *actualfreq)
{
return xtrx_tune_ex(dev, type, XTRX_CH_ALL, freq, actualfreq);
}
int xtrx_tune_ex(struct xtrx_dev* dev, xtrx_tune_t type, xtrx_channel_t ch,
double freq, double *actualfreq)
{
int res;
switch (type) {
case XTRX_TUNE_RX_FDD:
case XTRX_TUNE_TX_FDD:
case XTRX_TUNE_TX_AND_RX_TDD:
case XTRX_TUNE_EXT_FE:
if (!dev->refclock_checked) {
res = xtrx_set_ref_clk(dev, 0, dev->clock_source);
if (res)
return res;
}
for (unsigned devnum = 0; devnum < dev->dev_max; devnum++) {
unsigned fe_ch = (ch >> (2 * devnum)) & XTRX_CH_AB;
if (fe_ch == 0)
continue;
res = dev[devnum].fe->ops->fe_set_freq(dev[devnum].fe, fe_ch, type, freq, actualfreq);
if (res)
return res;
}
return 0;
case XTRX_TUNE_BB_RX:
case XTRX_TUNE_BB_TX:
for (unsigned devnum = 0; devnum < dev->dev_max; devnum++) {
unsigned fe_ch = (ch >> (2 * devnum)) & XTRX_CH_AB;
if (fe_ch == 0)
continue;
res = dev[devnum].fe->ops->bb_set_freq(dev[devnum].fe, fe_ch, type, freq, actualfreq);
if (res)
return res;
}
return 0;
}
return -EINVAL;
}
static int xtrx_tune_bandwidth(struct xtrx_dev* dev, xtrx_channel_t xch,
int rbb, double bw, double *actualbw)
{
int res;
unsigned type = (rbb) ? XTRX_TUNE_BB_RX : XTRX_TUNE_BB_TX;
for (unsigned devnum = 0; devnum < dev->dev_max; devnum++) {
unsigned fe_ch = (xch >> (2 * devnum)) & XTRX_CH_AB;
if (fe_ch == 0)
continue;
res = dev[devnum].fe->ops->bb_set_badwidth(dev[devnum].fe, fe_ch, type, bw, actualbw);
if (res)
return res;
}
return 0;
}
int xtrx_tune_tx_bandwidth(struct xtrx_dev* dev, xtrx_channel_t xch, double bw,
double *actualbw)
{
int res = xtrx_tune_bandwidth(dev, xch, 0, bw, &dev->tx_bandwidth);
if (actualbw) {
*actualbw = dev->tx_bandwidth;
}
return res;
}
int xtrx_tune_rx_bandwidth(struct xtrx_dev* dev, xtrx_channel_t xch, double bw,
double *actualbw)
{
int res = xtrx_tune_bandwidth(dev, xch, 1, bw, &dev->rx_bandwidth);
if (actualbw) {
*actualbw = dev->rx_bandwidth;
}
return res;
}
int xtrx_set_gain(struct xtrx_dev* dev, xtrx_channel_t xch, xtrx_gain_type_t gt,
double gain, double *actualgain)
{
// TODO BB/FE multiplexing
int res;
for (unsigned devnum = 0; devnum < dev->dev_max; devnum++) {
unsigned fe_ch = (xch >> (2 * devnum)) & XTRX_CH_AB;
if (fe_ch == 0)
continue;
res = dev[devnum].fe->ops->bb_set_gain(dev[devnum].fe, fe_ch, gt, gain, actualgain);
if (res)
return res;
}
return 0;
}
int xtrx_set_antenna(struct xtrx_dev* dev, xtrx_antenna_t antenna)
{
return xtrx_set_antenna_ex(dev, XTRX_CH_ALL, antenna);
}
int xtrx_set_antenna_ex(struct xtrx_dev* dev, xtrx_channel_t ch, xtrx_antenna_t antenna)
{
int res;
for (unsigned devnum = 0; devnum < dev->dev_max; devnum++) {
unsigned fe_ch = (ch >> (2 * devnum)) & XTRX_CH_AB;
if (fe_ch == 0)
continue;
res = dev[devnum].fe->ops->fe_set_lna(dev[devnum].fe, fe_ch, 0, antenna);
if (res)
return res;
}
return 0;
}
static unsigned _xtrx_ticks_to_ns(unsigned refclk, unsigned val)
{
return ((uint64_t)1000000000U) * val / refclk;
}
static unsigned _xtrx_ns_to_ticks(unsigned refclk, unsigned ns)
{
return (unsigned)(((uint64_t)ns) * refclk / 1000000000);
}
static int _xtrx_ns_to_ticks_i(int refclk, int ns)
{
return (int)(((int64_t)ns) * refclk / 1000000000);
}
/**
* @brief xtrx_wire_format_get_iq_size Get size of symbol IQ pair on the wire
* @param stream Stream
*/
static unsigned xtrx_wire_format_get_iq_size(xtrx_wire_format_t fmt)
{
switch (fmt) {
case XTRX_WF_8: return 2;
case XTRX_WF_12: return 3;
case XTRX_WF_16: return 4;
}
return 0;
}
/**
* @brief xtrx_wire_format_get_iq_size Get size of symbol IQ pair on the wire
* @param stream Stream
*/
static unsigned xtrx_host_format_get_iq_size(xtrx_host_format_t fmt)
{
switch (fmt) {
case XTRX_IQ_INT8: return 2;
case XTRX_IQ_INT16: return 4;
case XTRX_IQ_FLOAT32: return 8;
}
return 0;
}
static bool xtrx_run_params_stream_is_mimo(const xtrx_run_stream_params_t* stream)
{
return ((stream->chs & XTRX_CH_AB) == XTRX_CH_AB &&
!(stream->flags & XTRX_RSP_SISO_MODE));
}
static unsigned calculate_pkt_size(const xtrx_run_stream_params_t* stream)
{
return xtrx_wire_format_get_iq_size(stream->wfmt) *
stream->paketsize *
((xtrx_run_params_stream_is_mimo(stream)) ? 2 : 1);
}
static void xtrx_run_params_stream_init(xtrx_run_stream_params_t* stream)
{
stream->wfmt = XTRX_WF_16;
stream->hfmt = XTRX_IQ_FLOAT32;
stream->chs = XTRX_CH_AB;
stream->paketsize = 0;
stream->flags = 0;
}
void xtrx_run_params_init(xtrx_run_params_t* params)
{
params->dir = XTRX_TRX;
params->nflags = 0;
xtrx_run_params_stream_init(¶ms->rx);
xtrx_run_params_stream_init(¶ms->tx);
params->rx_stream_start = 0;
params->tx_repeat_buf = NULL;
}
#define MAX_TX_MSPS 8192
int xtrx_run_ex(struct xtrx_dev* dev, const xtrx_run_params_t* params)
{
int res = -EINVAL;
const int chan = 0; //TODO
xtrxll_mode_t tx_mode = XTRXLL_FE_MODE_MIMO;
xtrxll_fe_t tx_fe_fmt = XTRXLL_FE_DONTTOUCH;
xtrxll_mode_t rx_mode = XTRXLL_FE_MODE_MIMO;
unsigned rx_mode_flags = 0;
xtrxll_fe_t rx_fe_fmt = XTRXLL_FE_DONTTOUCH;
unsigned rx_bpkt_size = 0;
wts_long_t rx_start_ts = 0;
unsigned rx_stream_count = 0;
unsigned tx_stream_count = 0;
/* at least one direction must be specified */
if (!(params->dir & XTRX_TRX)) {
return -EINVAL;
}
if (params->dir & XTRX_RX) {
if ((params->rx.wfmt == XTRX_WF_8 && params->rx.hfmt == XTRX_IQ_INT16) ||
(params->rx.wfmt == XTRX_WF_16 && params->rx.hfmt == XTRX_IQ_INT8) ||
(params->rx.wfmt == XTRX_WF_12 && params->rx.hfmt != XTRX_IQ_FLOAT32)) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: Specified combination of host and wire formats isn't supported for RX stream\n",
_devname(dev));
return -EINVAL;
}
rx_bpkt_size = calculate_pkt_size(¶ms->rx) << dev->rx_host_decim;
if (params->rx.hfmt != XTRX_IQ_FLOAT32 && (params->rx.flags & XTRX_RSP_SCALE)) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: XTRX_RSP_SCALE is supported only for XTRX_IQ_FLOAT32 host format in RX stream\n",
_devname(dev));
return -EINVAL;
}
if (params->rx.flags & XTRX_STREAMDSP_1)
rx_mode_flags |= XTRXLL_FE_MODE_RXDSP_MODE1;
if (params->rx.flags & XTRX_STREAMDSP_2)
rx_mode_flags |= XTRXLL_FE_MODE_RXDSP_MODE2;
rx_mode = (xtrx_run_params_stream_is_mimo(¶ms->rx)) ? XTRXLL_FE_MODE_MIMO
: XTRXLL_FE_MODE_SISO;
rx_fe_fmt = (params->rx.wfmt == XTRX_WF_8) ? XTRXLL_FE_8BIT :
(params->rx.wfmt == XTRX_WF_12) ? XTRXLL_FE_12BIT : XTRXLL_FE_16BIT;
rx_stream_count = (rx_mode == XTRXLL_FE_MODE_SISO) ? 1 : 2;
}
if (params->dir & XTRX_TX) {
if ((params->tx.wfmt != XTRX_WF_16 || params->tx.hfmt == XTRX_IQ_INT8)) {
XTRXLLS_LOG("XTRX", XTRXLL_ERROR, "%s: Specified combination of host and wire formats isn't supported for TX stream\n",
_devname(dev));
return -EINVAL;
}
if (params->tx.hfmt != XTRX_IQ_FLOAT32 && (params->tx.flags & XTRX_RSP_SCALE)) {