Bug in panel-timing verification?

[stefffe]

Hey, I have a small Winstar 160x80 TFT LCD display that I wrote a custom driver for, but then I found this generic driver which seems to be a great option. I have however one issue. When adding my display, I use the following panel-timings for devicetree:

                timing: panel-timing {
                        hactive = <160>;
                        vactive = <80>;

                        vback-porch = <0x1a>;
                        vfront-porch = <0x69>;
                        vsync-len = <0>;

                        hback-porch = <0x01>;
                        hfront-porch = <0xa0>;
                        hsync-len = <0>;

                        clock-frequency = <0>;
                };

This is required since my display has both a back-poch and front-porch. But when inserting the above values and loading the driver, it bails out with:

panel-mipi-dbi-spi spi0.0: /n_ahb@e0000000/spi@e0011000/display@0: panel-timing out of bounds

So I read through the code, and found this check here which I do not fully understand:

        if (!mode->hdisplay || !mode->vdisplay || mode->flags ||                                  
            mode->hsync_end > mode->hdisplay || (hback_porch + mode->hdisplay) > 0xffff ||          
            mode->vsync_end > mode->vdisplay || (vback_porch + mode->vdisplay) > 0xffff) {          
                dev_err(dev, "%pOF: panel-timing out of bounds\n", dev->of_node);                 
                return -EINVAL;                                                                   
        }  

Given the input above to devicetree, adding a few prints to the driver tells me during probe that the different values are:

<3>[  221.200790][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: htotal              : 0x141
<3>[  221.201017][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: vtotal              : 0xd3
<3>[  221.201222][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: hdisplay            : 0xa0
<3>[  221.201428][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: vdisplay            : 0x50
<3>[  221.201543][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: flags               : 0x0
<3>[  221.201746][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: hsync_end           : 0x140
<3>[  221.202088][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: vsync_end           : 0xb9
<3>[  221.202214][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: clock               : 0x0
<3>[  221.202426][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: C: hback_porch (LO) : 0x1
<3>[  221.202631][ T4625] panel-mipi-dbi-spi spi0.0: PANEL: C: vback_porch (TO) : 0x1a

The part of the panel-timing check above that always fails are:
mode->hsync_end > mode->hdisplay (and corresponding vsync_end)
Reading https://www.kernel.org/doc/Documentation/devicetree/bindings/display/panel/panel-timing.yaml leads me to believe that:

• hsync_end is hback_porch + hactive + hfront_porch => 0x140
• hdisplay is the pixel width of the display => 0xa0
  Uhm, but then hsync_end will always be bigger than hdisplay if you have back/front-porch, and the check will always fail,... ?

If I change the check (replace hdisplay with htotal and vdisplay with vtotal), then the driver loads perfectly fine and my display works exactly as it should, with correct back-porch etc.

Now, is this a bug, or am I completely misunderstanding something here? :o)

Best Regards
Stefan Nilsson

[notro]

The timing node is used differently in this driver:

  The panel resolution is specified using the panel-timing node properties
  hactive (width) and vactive (height). The other mandatory panel-timing
  properties should be set to zero except clock-frequency which can be
  optionally set to inform about the actual pixel clock frequency.

  If the panel is wired to the controller at an offset specify this using
  hback-porch (x-offset) and vback-porch (y-offset).

https://www.kernel.org/doc/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml

[stefffe]

Ah, yes! Removing the front-porch settings makes it all work. Thanks for the clarification!