This 4-1 multiplexer takes an input of four bits and another input of 2-bits and outputs the selected input. In this module, the two bits are the select bits that would select which one the inputs should be designated as the output.
Simulation results from the Verilog representation of this 4-1 Multiplexer
- 4-1 Multiplexer Module - mux_four_to_one.v
- 4-1 Multiplexer Test Bench - mux_four_to_one_test.v