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compressed auipc #158

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jnk0le opened this issue Apr 23, 2022 · 3 comments
Open

compressed auipc #158

jnk0le opened this issue Apr 23, 2022 · 3 comments
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future idea Something for a future version of the spec

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@jnk0le
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jnk0le commented Apr 23, 2022

standard 3bit rd`
without immediate, has a range of subsequent addi/lw with +-2KiB range, adding small imm multiplies it

use cases:

  • callback heavy code

need to find such codebases (usually proprietary)
Results could be biased by current compilers not caring about callback code placement (no reason to), loading addresses from .rodata or as lui + addi

  • addressing .rodata

sometimes .rodata is in close range of current pc (e.g. small embedded with like <=32K of FLASH)
not very useful if tp ends up as .rodata pointer instead of second gp

EDIT:

  • PIC code: GOT table acceses are also auipc based
@jnk0le
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jnk0le commented Apr 23, 2022

IIRC someone was talking about such instr on isa-dev long time ago

@jnk0le
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jnk0le commented Apr 24, 2022

assuming that all sections land close to each other

  • with larger constant it can also reach rest of .data and .bss

embedded: I don't expect sram placed so close to flash

wrt memory models:
medlow + no offset: compete with c.lui - no gain
medany + no offset: is the compiler allowed to emit lui instead of auipc anyway? if yes - no gain

about the constant: reserved encoding next to compressed loads/stores allows for upto 7 bits of imm. +- 260K addresable space

@jnk0le
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jnk0le commented May 28, 2022

to make encoding symmetric with c.lui, load/store {b,bu,h,hu} encoding needs to change, so the 12th bit becomes sign extension.

15:13 12 11:10 9:7 6:2 1:0
101 imm[17] c.auipc rd' imm[16:12] 00

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