Check if clobber_abi is correctly supported

[antoyo]

rust-lang/rust#87581

After #72 is merged.
Needs updating to a more recent nightly.

[ghost]

I'm not sure what kind of check you want here. This piece makes me think that the whole handling of clobber_abi is done by the rustc frontend and the GCC backend is not even aware of it - all the registers are simpley added to the outputs list as out("reg") _.

LLVM backend haven't been updated as well.

[antoyo]

Yup, I know. But I still want to check that it works. I think there's a test in Rust that checks this, so we might not have much to do.

[ghost]

The test is src/test/codegen/asm-clobber_abi.rs. I'll try to update the backend to the latest nightly tomorrow and see if it passes.

[antoyo]

You'll have to enable those codegen tests as well.

[folkertdev]

The clobbering logic is incorrect when input and clobbered registers overlap.

The clobber_abi feature is implemented by adding additional lateout("reg") operands for the registers that a specific abi clobbers. We can replicate the issue like so https://godbolt.org/z/bsTEfGT3Y

    let mut x = 8;
    unsafe {
        std::arch::asm!(
            "mov rax, rdi",
            in("rdi") x,
            lateout("rdi") _,
        );
    }

or equivalently

    let mut x = 8;
    unsafe {
        std::arch::asm!(
            "mov rax, rdi",
            in("rdi") x,
            clobber_abi("sysv64"),
        );
    }

libgccjit.so: error: : 'asm' specifier for variable 'input_register' conflicts with 'asm' clobber list

and it's right, in that the di register is clobbered because of the sysv64 calling convention

[src/asm.rs:298:9] &clobbers = [
    "cx",
    "dx",
    "si",
    "di",
    "r8",
    "r9",
    "r10",
    "r11",
    "xmm0",
    "xmm1",
    "xmm2",
    "xmm3",
    "xmm4",
    "xmm5",
    "xmm6",
    "xmm7",
    "xmm8",
    "xmm9",
    "xmm10",
    "xmm11",
    "xmm12",
    "xmm13",
    "xmm14",
    "xmm15",
]

This seems to be a GCC rule: input and clobber registers cannot overlap.

I believe the right idea here is to treat an in("reg") that is also clobbered (i.e. in the clobbers vec) as an inlateout("reg"), meaning that it is put both into the outputs vector (with late: true and out_place: None) and the inputs vector like normal. This works for me locally for the examples I've tried so far.