@@ -478,6 +478,15 @@ macro_rules! t_t_s {
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}
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macro_rules! t_u {
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+ ( vector_bool_char) => {
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+ vector_unsigned_char
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+ } ;
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+ ( vector_bool_short) => {
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+ vector_unsigned_short
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+ } ;
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+ ( vector_bool_int) => {
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+ vector_unsigned_int
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+ } ;
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( vector_unsigned_char) => {
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vector_unsigned_char
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} ;
@@ -496,6 +505,42 @@ macro_rules! t_u {
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( vector_signed_int) => {
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vector_unsigned_int
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} ;
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+ ( vector_float) => {
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+ vector_unsigned_int
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+ } ;
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+ }
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+
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+ macro_rules! t_b {
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+ ( vector_bool_char) => {
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+ vector_bool_char
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+ } ;
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+ ( vector_bool_short) => {
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+ vector_bool_short
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+ } ;
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+ ( vector_bool_int) => {
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+ vector_bool_int
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+ } ;
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+ ( vector_signed_char) => {
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+ vector_bool_char
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+ } ;
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+ ( vector_signed_short) => {
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+ vector_bool_short
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+ } ;
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+ ( vector_signed_int) => {
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+ vector_bool_int
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+ } ;
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+ ( vector_unsigned_char) => {
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+ vector_bool_char
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+ } ;
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+ ( vector_unsigned_short) => {
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+ vector_bool_short
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+ } ;
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+ ( vector_unsigned_int) => {
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+ vector_bool_int
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+ } ;
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+ ( vector_float) => {
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+ vector_bool_int
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+ } ;
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}
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macro_rules! impl_from {
@@ -2572,6 +2617,62 @@ mod sealed {
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impl_vec_trait ! { [ VectorNand vec_nand] + 2 b ( vec_vnandsb, vec_vnandsh, vec_vnandsw) }
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+ #[ inline]
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+ #[ target_feature( enable = "altivec" ) ]
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+ #[ cfg_attr( all( test, not( target_feature = "vsx" ) ) , assert_instr( vsel) ) ]
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+ #[ cfg_attr( all( test, target_feature = "vsx" ) , assert_instr( xxsel) ) ]
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+ pub unsafe fn vec_vsel (
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+ a : vector_signed_char ,
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+ b : vector_signed_char ,
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+ c : vector_signed_char ,
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+ ) -> vector_signed_char {
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+ let a: i8x16 = transmute ( a) ;
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+ let b: i8x16 = transmute ( b) ;
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+ let c: i8x16 = transmute ( c) ;
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+ let not_c = simd_xor ( c, i8x16:: splat ( !0 ) ) ;
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+
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+ transmute ( simd_or ( simd_and ( a, not_c) , simd_and ( b, c) ) )
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+ }
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+
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+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
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+ pub trait VectorSel < Mask > {
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+ unsafe fn vec_sel ( self , b : Self , c : Mask ) -> Self ;
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+ }
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+
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+ macro_rules! vector_sel {
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+ ( $ty: ty, $m: ty) => {
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+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
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+ impl VectorSel <$m> for $ty {
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+ #[ inline]
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+ #[ target_feature( enable = "altivec" ) ]
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+ unsafe fn vec_sel( self , b: Self , c: $m) -> Self {
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+ let a = transmute( self ) ;
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+ let b = transmute( b) ;
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+ let c = transmute( c) ;
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+
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+ transmute( vec_vsel( a, b, c) )
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+ }
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+ }
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+ } ;
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+ ( $ty: ident) => {
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+ vector_sel! { $ty, t_b!{ $ty } }
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+ vector_sel! { $ty, t_u!{ $ty } }
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+ vector_sel! { t_u!{ $ty } , t_b!{ $ty } }
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+ vector_sel! { t_u!{ $ty } , t_u!{ $ty } }
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+ vector_sel! { t_b!{ $ty } , t_b!{ $ty } }
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+ vector_sel! { t_b!{ $ty } , t_u!{ $ty } }
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+ } ;
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+ ( - $ty: ident) => {
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+ vector_sel! { $ty, t_b!{ $ty } }
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+ vector_sel! { $ty, t_u!{ $ty } }
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+ } ;
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+ }
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+
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+ vector_sel ! { vector_signed_char }
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+ vector_sel ! { vector_signed_short }
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+ vector_sel ! { vector_signed_int }
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+ vector_sel ! { - vector_float }
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+
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#[ inline]
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#[ target_feature( enable = "altivec" ) ]
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#[ cfg_attr( test, assert_instr( vcfsx, IMM5 = 1 ) ) ]
@@ -4188,6 +4289,25 @@ pub unsafe fn vec_nmsub(a: vector_float, b: vector_float, c: vector_float) -> ve
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vnmsubfp ( a, b, c)
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}
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+ /// Vector Select
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+ ///
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+ /// ## Purpose
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+ /// Returns a vector selecting bits from two source vectors depending on the corresponding
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+ /// bit values of a third source vector.
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+ ///
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+ /// ## Result value
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+ /// Each bit of r has the value of the corresponding bit of a if the corresponding
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+ /// bit of c is 0. Otherwise, the bit of r has the value of the corresponding bit of b.
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+ #[ inline]
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+ #[ target_feature( enable = "altivec" ) ]
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+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
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+ pub unsafe fn vec_sel < T , U > ( a : T , b : T , c : U ) -> T
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+ where
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+ T : sealed:: VectorSel < U > ,
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+ {
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+ a. vec_sel ( b, c)
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+ }
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+
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/// Vector Sum Across Partial (1/4) Saturated
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#[ inline]
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#[ target_feature( enable = "altivec" ) ]
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