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Workaround bad generated code for 256-bit vector all/any reductions on ARM/AArch64 #426

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gnzlbg opened this issue Apr 12, 2018 · 1 comment

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@gnzlbg
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gnzlbg commented Apr 12, 2018

This was not covered in #425

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gnzlbg commented Jul 19, 2018

This is now tracked in: https://github.com/gnzlbg/packed_simd/issues/8

@gnzlbg gnzlbg closed this as completed Jul 19, 2018
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