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Commit 4adffc0

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author
Paul Prozesky
committed
Refactor to allow skarab- or roach-style devices
1 parent a783dcc commit 4adffc0

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11 files changed

+1150
-833
lines changed

11 files changed

+1150
-833
lines changed

scripts/casperfpga_tengbe_status.py

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -2,13 +2,7 @@
22
# -*- coding: utf-8 -*-
33
# pylint: disable-msg=C0103
44
# pylint: disable-msg=C0301
5-
"""
6-
View the status of a given xengine.
75

8-
Created on Fri Jan 3 10:40:53 2014
9-
10-
@author: paulp
11-
"""
126
import sys
137
import time
148
import argparse
@@ -53,7 +47,8 @@
5347
except AttributeError:
5448
raise RuntimeError('No such log level: %s' % log_level)
5549
# import logging
56-
# logging.basicConfig(filename='/tmp/casperfpga_tengbe_status_curses.log', level=logging.DEBUG)
50+
# logging.basicConfig(filename='/tmp/casperfpga_tengbe_status_curses.log',
51+
# level=logging.DEBUG)
5752
# logging.info('****************************************************')
5853

5954
if args.comms == 'katcp':
@@ -75,7 +70,7 @@
7570
utils.threaded_fpga_function(fpgas, 10, 'test_connection')
7671
utils.threaded_fpga_function(fpgas, 15, 'get_system_information')
7772
for fpga in fpgas:
78-
numgbes = len(fpga.tengbes)
73+
numgbes = len(fpga.gbes)
7974
if numgbes < 1:
8075
raise RuntimeWarning('Host %s has no 10gbe cores', fpga.host)
8176
print '%s: found %i 10gbe core%s.' % (
@@ -100,7 +95,7 @@ def get_gbe_data(fpga):
10095
Get 10gbe data counters from the fpga.
10196
"""
10297
returndata = {}
103-
for gbecore in fpga.tengbes:
98+
for gbecore in fpga.gbes:
10499
ctr_data = gbecore.read_counters()
105100
for regname in ctr_data:
106101
regdata = ctr_data[regname]
@@ -118,8 +113,8 @@ def get_tap_data(fpga):
118113
What it says on the tin.
119114
"""
120115
data = {}
121-
for gbecore in fpga.tengbes.names():
122-
data[gbecore] = fpga.tengbes[gbecore].tap_info()
116+
for gbecore in fpga.gbes.names():
117+
data[gbecore] = fpga.gbes[gbecore].tap_info()
123118
return data
124119

125120
# get gbe and tap data
@@ -164,7 +159,7 @@ def exit_gracefully(sig, frame):
164159
max_1st_col_offset = -1
165160
for fpga in fpgas:
166161
max_1st_col_offset = max(max_1st_col_offset, len(fpga.host))
167-
for gbe_name in fpga.tengbes.names():
162+
for gbe_name in fpga.gbes.names():
168163
max_1st_col_offset = max(max_1st_col_offset, len(gbe_name))
169164
max_fldname = -1
170165
for hdr in fpga_headers:

src/__init__.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,14 +6,14 @@
66
from bitfield import Bitfield, Field
77
from dcp_fpga import DcpFpga
88
from katadc import KatAdc
9-
from katcp_fpga import KatcpFpga
9+
from transport_katcp import KatcpTransport
10+
from transport_skarab import SkarabTransport
1011
from memory import Memory
1112
from qdr import Qdr
1213
from register import Register
1314
from sbram import Sbram
1415
from snap import Snap
1516
from tengbe import TenGbe
16-
from skarab_fpga import SkarabFpga
1717

1818
# BEGIN VERSION CHECK
1919
# Get package version when locally imported from repo or via -e develop install

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