diff --git a/sw/openocd/openocd_neorv32.cfg b/sw/openocd/openocd_neorv32.cfg
index cc805eae8..57cb3aeaf 100644
--- a/sw/openocd/openocd_neorv32.cfg
+++ b/sw/openocd/openocd_neorv32.cfg
@@ -14,10 +14,10 @@ transport select jtag
 # -------------------------------------------------------------------
 # Target configuration
 # -------------------------------------------------------------------
-set _CHIPNAME neorv32
-jtag newtap $_CHIPNAME cpu -irlen 5
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+set chipname neorv32
+jtag newtap $chipname cpu -irlen 5
+set targetname $chipname.cpu
+target create $targetname.0 riscv -chain-position $targetname
 
 # expose NEORV32-specific CSRs
 riscv expose_csrs 2048=cfureg0