hardcaml.opam

opam-version: "2.0"
maintainer: "Jane Street developers"
authors: ["Jane Street Group, LLC"]
homepage: "https://github.com/janestreet/hardcaml"
bug-reports: "https://github.com/janestreet/hardcaml/issues"
dev-repo: "git+https://github.com/janestreet/hardcaml.git"
doc: "https://ocaml.janestreet.com/ocaml-core/latest/doc/hardcaml/index.html"
license: "MIT"
build: [
  ["dune" "build" "-p" name "-j" jobs]
]
depends: [
  "ocaml" {>= "4.14.0"}
  "base"
  "bin_prot"
  "core_kernel"
  "ppx_jane"
  "ppx_sexp_conv"
  "stdio"
  "topological_sort"
  "dune"             {>= "2.0.0"}
  "ppxlib"           {>= "0.28.0"}
  "zarith"           {>= "1.11"}
]
available: arch != "arm32" & arch != "x86_32"
synopsis: "RTL Hardware De# OCaml"
description: "
Hardcaml is an embedded DSL for designing and simulating hardware in OCaml.
Generic hardware designs are easily expressed using features such as higher
order functions, lists, maps etc.  A built in simulator allows designs to
be simulated within Hardcaml.  Designs are converted to either Verilog or
VHDL to interact with standard back end tooling.
"