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xilinx-fpga
Here are 216 public repositories matching this topic...
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
python toolchain documentation fpga sphinx primitives verilog synthesis lattice hdl xilinx-fpga ice40 artix7 artix vpr kintex7 architecture-definitions verilog-simulator symbiflow verilog-simulations
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May 18, 2025 - Jupyter Notebook
blaze is a Rust library for ZK acceleration on Xilinx FPGAs.
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Oct 22, 2024 - Rust
Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.
fpga verilog logic-analyzer xilinx-fpga altera-fpga lattice-fpga digital-signal-analyzer ftdi232h ftdi2232h
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Jun 24, 2021 - Verilog
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
llvm clang xilinx-fpga sycl cpp20 accelerators xilinx-vitis trisycl oneapi-dpc sycl-compilation dpc-toolchain
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Nov 4, 2024 - C++
Xilinx Virtual Cable Server for Raspberry Pi
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Mar 14, 2022 - C
FTDI FT600 SuperSpeed USB3.0 to AXI bus master
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Jun 6, 2020 - C++
Plugins for Yosys developed as part of the F4PGA project.
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May 14, 2024 - Verilog
Minimal DVI / HDMI Framebuffer
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Aug 9, 2020 - Verilog
Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
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Feb 9, 2022 - SystemVerilog
💰 A simplified version of an FPGA bitcoin miner 💰
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Jul 9, 2019 - VHDL
This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
calculator vhdl matrix-multiplication verilog xilinx hardware-designs xilinx-fpga low-level-programming xilinx-ise xilinx-vivado ic-design
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Aug 12, 2017 - Verilog
Re-coded Xilinx primitives for Verilator use
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Mar 1, 2024 - Verilog
building blocks for accelerating ZK proofs over binary fields
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Aug 8, 2024 - Verilog
Open-source CSI-2 receiver for Xilinx UltraScale parts
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Jul 10, 2019 - Verilog
中国科学院大学 计算机组成原理FPGA实验课程 - "Five projects to better understand key principles of computer systems", UCAS Spring 2017 Session
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Jun 24, 2017 - Verilog
This repository contains the hardware design source files of the Hex Five X300 RISC-V SoC. The X300 is Hex Five's official reference HW platform for its MultiZone Trusted Execution Environment and MultiZone Trusted Firmware. The X300 is an enhanced secure version of the SiFive's Freedom E300 built around the Rocket chip developed at U.C. Berkeley.
fpga rocket-chip xilinx fpga-soc risc-v xilinx-fpga bitstream digilent e300 sifive artix-100t sifive-freedom arty-a7 artix-35t
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Jan 23, 2024 - Scala
Colorspace conversion, gamma correction, and more -- all integrated within a MIPI-to-HDMI pipeline in FPGA.
fpga verilog hdmi xilinx-fpga rgb2yuv gamma-correction mipi yuv2rgb piecewise-linear-approximation sea-s7 spartan7
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Jul 30, 2020 - VHDL
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