Adding GIC v2 interrupt group handling to GCC_AARCH64 port. #1135
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
|
# for free
to join this conversation on GitHub.
Already have an account?
# to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Description
re: #316 (comment)
Adding handling for GIC V2 interrupt grouping and security extension. Additional handling determines which interrupt group is asserted by inspecting HPPIR. Based on the interrupt group IAR/EOIR or AIAR/AEOIR registers are used to acknowledge and end interrupts.
Test Steps
Test target used = STM32MP357F-EV1.
Manually verified interrupt acknowledgement, routing, and ending for group 0 and group 1 interrupts by utilizing the ARMV8-A physical timer interrupt and varying the security routing of the interrupt.
Checklist:
Related Issue
By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.