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Merge pull request #10 from IntelPython/cbwr-roundtrip
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Cbwr roundtrip
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oleksandr-pavlyk authored Aug 28, 2019
2 parents 0634e07 + 00ec43d commit d0a082b
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Showing 5 changed files with 87 additions and 65 deletions.
6 changes: 6 additions & 0 deletions CHANGES.rst
Original file line number Diff line number Diff line change
Expand Up @@ -49,3 +49,9 @@ Closed issues #8, #7 and #5.
Extended `mkl.cbwr_set` to recognize `'avx512_e1'`, `'avx512_mic_e1'`, as as strict conditional numerical reproducibility, supported via `'avx2,strict'`, `'avx512,strict'` (see [issue/8](http://github.com/IntelPython/mkl-service/issues/8)).

Extended `mkl.cbwrt_get()` to mean `mkl.cbwr('all')`.

2.3.0
=====

Fixed CI to actually execute tests. Populated CBWR constants to match MKL headers.
Added tests checking that `cbwr_set` and `cbwr_get` round-trip.
12 changes: 7 additions & 5 deletions conda-recipe/meta.yaml
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
{% set version = "2.1.0" %}
{% set version = "2.3.0" %}
{% set buildnumber = 0 %}

package:
Expand All @@ -20,20 +20,22 @@ requirements:
host:
- python
- setuptools
- mkl-devel
- mkl-devel >=2019.3
- cython
run:
- python
- mkl
- mkl >=2019.3
- six

test:
commands:
- nosetests -v mkl
requires:
- nose
imports:
- mkl
commands:
- nosetests -v tests
source_files:
- tests

about:
home: http://github.com/IntelPython/mkl-service
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17 changes: 11 additions & 6 deletions mkl/_mkl_service.pxd
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Expand Up @@ -45,26 +45,31 @@ cdef extern from "mkl.h":
int MKL_MEM_MCDRAM

# CNR Control Constants
int MKL_CBWR_BRANCH
int MKL_CBWR_ALL

int MKL_CBWR_STRICT

int MKL_CBWR_OFF
int MKL_CBWR_BRANCH_OFF
int MKL_CBWR_AUTO
int MKL_CBWR_COMPATIBLE
int MKL_CBWR_SSE2
int MKL_CBWR_SSE3
int MKL_CBWR_SSSE3
int MKL_CBWR_SSE4_1
int MKL_CBWR_SSE4_2
int MKL_CBWR_AVX
int MKL_CBWR_AVX2
int MKL_CBWR_AVX512_MIC
int MKL_CBWR_AVX512
int MKL_CBWR_STRICT
int MKL_CBWR_AVX512_E1
int MKL_CBWR_AVX512_MIC_E1
int MKL_CBWR_BRANCH
int MKL_CBWR_ALL
int MKL_CBWR_AVX512_E1

int MKL_CBWR_SUCCESS
int MKL_CBWR_BRANCH_OFF
int MKL_CBWR_ERR_INVALID_SETTINGS
int MKL_CBWR_ERR_INVALID_INPUT
int MKL_CBWR_ERR_UNSUPPORTED_BRANCH
int MKL_CBWR_ERR_UNKNOWN_BRANCH
int MKL_CBWR_ERR_MODE_CHANGE_FAILURE

# ISA Constants
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32 changes: 22 additions & 10 deletions mkl/_mkl_service.pyx
Original file line number Diff line number Diff line change
Expand Up @@ -645,23 +645,23 @@ cdef object __cbwr_set(branch=None):
"""
__variables = {
'input': {
'off': mkl.MKL_CBWR_BRANCH_OFF,
'off': mkl.MKL_CBWR_OFF,
'branch_off': mkl.MKL_CBWR_BRANCH_OFF,
'auto': mkl.MKL_CBWR_AUTO,
'compatible': mkl.MKL_CBWR_COMPATIBLE,
'sse2': mkl.MKL_CBWR_SSE2,
'sse3': mkl.MKL_CBWR_SSE3,
'ssse3': mkl.MKL_CBWR_SSSE3,
'sse4_1': mkl.MKL_CBWR_SSE4_1,
'sse4_2': mkl.MKL_CBWR_SSE4_2,
'avx': mkl.MKL_CBWR_AVX,
'avx2': mkl.MKL_CBWR_AVX2,
'avx512_mic': mkl.MKL_CBWR_AVX512_MIC,
'avx512': mkl.MKL_CBWR_AVX512,
'avx512_e1': mkl.MKL_CBWR_AVX512_E1,
'avx512_mic_e1': mkl.MKL_CBWR_AVX512_MIC_E1,
'avx2,strict': mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT,
'avx512_mic': mkl.MKL_CBWR_AVX512_MIC,
'avx512_mic,strict': mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT,
'avx512': mkl.MKL_CBWR_AVX512,
'avx512,strict': mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT,
'avx512_mic_e1': mkl.MKL_CBWR_AVX512_MIC_E1,
'avx512_e1': mkl.MKL_CBWR_AVX512_E1,
'avx512_e1,strict': mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT,
},
'output': {
Expand Down Expand Up @@ -690,19 +690,23 @@ cdef inline __cbwr_get(cnr_const=None):
'all': mkl.MKL_CBWR_ALL,
},
'output': {
mkl.MKL_CBWR_BRANCH_OFF: 'off',
mkl.MKL_CBWR_BRANCH_OFF: 'branch_off',
mkl.MKL_CBWR_AUTO: 'auto',
mkl.MKL_CBWR_COMPATIBLE: 'compatible',
mkl.MKL_CBWR_SSE2: 'sse2',
mkl.MKL_CBWR_SSE3: 'sse3',
mkl.MKL_CBWR_SSSE3: 'ssse3',
mkl.MKL_CBWR_SSE4_1: 'sse4_1',
mkl.MKL_CBWR_SSE4_2: 'sse4_2',
mkl.MKL_CBWR_AVX: 'avx',
mkl.MKL_CBWR_AVX2: 'avx2',
mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: 'avx2,strict',
mkl.MKL_CBWR_AVX512_MIC: 'avx512_mic',
mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: 'avx512_mic,strict',
mkl.MKL_CBWR_AVX512: 'avx512',
mkl.MKL_CBWR_SUCCESS: 'success',
mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: 'avx512,strict',
mkl.MKL_CBWR_AVX512_MIC_E1: 'avx512_mic_e1',
mkl.MKL_CBWR_AVX512_E1: 'avx512_e1',
mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: 'avx512_e1,strict',
mkl.MKL_CBWR_ERR_INVALID_INPUT: 'err_invalid_input',
},
}
Expand All @@ -721,17 +725,25 @@ cdef object __cbwr_get_auto_branch():
"""
__variables = {
'output': {
mkl.MKL_CBWR_BRANCH_OFF: 'branch_off',
mkl.MKL_CBWR_AUTO: 'auto',
mkl.MKL_CBWR_COMPATIBLE: 'compatible',
mkl.MKL_CBWR_SSE2: 'sse2',
mkl.MKL_CBWR_SSE3: 'sse3',
mkl.MKL_CBWR_SSSE3: 'ssse3',
mkl.MKL_CBWR_SSE4_1: 'sse4_1',
mkl.MKL_CBWR_SSE4_2: 'sse4_2',
mkl.MKL_CBWR_AVX: 'avx',
mkl.MKL_CBWR_AVX2: 'avx2',
mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: 'avx2,strict',
mkl.MKL_CBWR_AVX512_MIC: 'avx512_mic',
mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: 'avx512_mic,strict',
mkl.MKL_CBWR_AVX512: 'avx512',
mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: 'avx512,strict',
mkl.MKL_CBWR_AVX512_MIC_E1: 'avx512_mic_e1',
mkl.MKL_CBWR_AVX512_E1: 'avx512_e1',
mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: 'avx512_e1,strict',
mkl.MKL_CBWR_SUCCESS: 'success',
mkl.MKL_CBWR_ERR_INVALID_INPUT: 'err_invalid_input',
},
}

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85 changes: 41 additions & 44 deletions tests/test_mkl_service.py
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


from nose.tools import nottest
from nose.tools import assert_equals, nottest
import six
import mkl

Expand Down Expand Up @@ -131,7 +131,7 @@ def test_get_dynamic(self):
mkl.get_dynamic()


class test_timing:
class test_timing():
# https://software.intel.com/en-us/mkl-developer-reference-c-timing
def test_second(self):
s1 = mkl.second()
Expand Down Expand Up @@ -191,49 +191,46 @@ def test_set_memory_limit(self):
mkl.set_memory_limit(128)


class test_conditional_numerical_reproducibility_control:
class test_cnr_control():
# https://software.intel.com/en-us/mkl-developer-reference-c-conditional-numerical-reproducibility-control
def test_cbwr_set_off(self):
mkl.cbwr_set(branch='off')

def test_cbwr_set_auto(self):
mkl.cbwr_set(branch='auto')

def test_cbwr_set_compatible(self):
mkl.cbwr_set(branch='compatible')

def test_cbwr_set_sse2(self):
mkl.cbwr_set(branch='sse2')

def test_cbwr_set_sse3(self):
mkl.cbwr_set(branch='sse3')

def test_cbwr_set_ssse3(self):
mkl.cbwr_set(branch='ssse3')

def test_cbwr_set_sse4_1(self):
mkl.cbwr_set(branch='sse4_1')

def test_cbwr_set_sse4_2(self):
mkl.cbwr_set(branch='sse4_2')

def test_cbwr_set_avx(self):
mkl.cbwr_set(branch='avx')

def test_cbwr_set_avx2(self):
mkl.cbwr_set(branch='avx2')

def test_cbwr_set_avx512_mic(self):
mkl.cbwr_set(branch='avx512_mic')

def test_cbwr_set_avx512(self):
mkl.cbwr_set(branch='avx512')

def test_cbwr_get(self):
mkl.cbwr_get(cnr_const='all')

def test_cbwr_get(self):
mkl.cbwr_get(cnr_const='branch')
def test_cbwr(self):
branches = [
'off',
'branch_off',
'auto',
'compatible',
'sse2',
'ssse3',
'sse4_1',
'sse4_2',
'avx',
'avx2',
'avx512_mic',
'avx512',
'avx512_mic_e1',
'avx512_e1',
]
strict = [
'avx2,strict',
'avx512_mic,strict',
'avx512,strict',
'avx512_e1,strict',
]
for branch in branches:
yield self.check_cbwr, branch, 'branch'
for branch in branches + strict:
yield self.check_cbwr, branch, 'all'

def check_cbwr(self, branch, cnr_const):
status = mkl.cbwr_set(branch=branch)
if status == 'success':
expected_value = 'branch_off' if branch == 'off' else branch
actual_value = mkl.cbwr_get(cnr_const=cnr_const)
assert_equals(actual_value,
expected_value,
msg="Round-trip failure for CNR branch '{}', CNR const '{}'".format(branch, cnr_const))
elif status != 'err_unsupported_branch':
raise AssertionError(status)

def test_cbwr_get_auto_branch(self):
mkl.cbwr_get_auto_branch()
Expand Down

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