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Risc-V Interpreter

Interpreter for Risc-V assembly built with Rust
Report bug · Request feature

Table of contents

Quick start

The program will take a file path as an arg in the command line

  • Install rust toolchain
  • Within project root, on cli, run:
    • cargo run "file.extension"
  • Now you should see the result if your assembly code is correct :)

Exemple Program

.data
DIVIDEND: .word 20
SPACE:.asciz " "
DIVISOR: .word 7
ARRAY: .word -118, 8, 7, 99
RESULT: .word -1
REMAINDER: .word -1

.text

.main:
  # euclidean division algorithm

  la a0, DIVIDEND
  la a1, DIVISOR

  lw a0, 0(a0)
  lw a1, 0(a1)

  jal floorDiv

  la t0, RESULT
  sw a0, 0(t0)

  la t0, REMAINDER
  sw a1, 0(t0)

  li a7, 10
  ecall


floorDiv:
    blt a0, zero, normUp
    li t5, 0

afterNormUp:
    blt a1, zero, normBottom
    li t6, 0

afterNormBottom:
    li t0, 0

    j while

normUp:
    sub a0, zero, a0
    li t5, 1

    j afterNormUp

normBottom:
    sub a1, zero, a1
    li t6, 1

    j afterNormBottom

while:
    blt a0, a1, endWhile
    sub a0, a0, a1

    addi t0, t0, 1

    j while

endWhile:
    xor t1, t5, t6
    bgt t1, zero, changeSign
    j endFloorDiv

changeSign:
    sub t0, zero, t0

endFloorDiv:
    mv a1, a0
    mv a0, t0

    ret

Instructions Supported

// R-type
Add,
Sub,
Mul,
Div,
Rem,
Sll,
Xor,
Or,
And,

// I-type
Addi,
Slli,
Xori,
Ori,
Andi,
Lw,
La,

// B-type
Blt,
Beq,
Bgt,

// S-type
Sw,

// J-type
J,
Jal,
Jalr,

// Pseudo Instructions
Ret,
Li,
Mv,

Ecalls Supported

10 => finish program

Not Yet Supported Features

  • Most of .data, actually only two are supported
    • .word
    • .asciz

What's included

Basic RI32I and RI32M is covered. Stack is also supported but only using sp reg to access it

interpreter/
└── src/
    ├── dot_data/
    │   ├── data.rs
    │   └── mod.rs
    ├── file_reader/
    │    ├── mod.rs
    │    └── reader.rs
    ├── instructions/
    │    ├── B_type/
    │    │    ├── B_type.rs
    │    │    ├── mod.rs
    │    │    ├── pub_utils.rs
    │    │    └── utils.rs
    │    ├── I_type/
    │    │    ├── I_type.rs
    │    │    ├── load_utils.rs
    │    │    ├── mod.rs  
    │    │    ├── pub_utils.rs
    │    │    └── utils.rs
    │    ├── J_type/
    │    │    ├── J_type.rs
    │    │    ├── mod.rs
    │    │    ├── pub_utils.rs
    │    │    └── utils.rs
    │    ├── R_type/
    │    │    ├── mod.rs
    │    │    ├── pub_utils.rs
    │    │    ├── R_type.rs
    │    │    └── utils.rs
    │    ├── S_type/
    │    │    ├── pub_utils.rs
    │    │    ├── S_type.rs
    │    │    └── utils.rs
    │    ├── instruction.rs
    │    └── mod.rs    
    ├── registers/
    │   ├── mod.rs
    │   └── registers.rs
    ├── stack/
    │   ├── mod.rs
    │   ├── pub_utils.rs
    │   └── stack.rs
    ├── run/
    │    ├── mod.rs
    │    └── run.rs
    ├── .gitignore
    ├── Cargo.lock
    ├── Cargo.toml
    ├── LICENSE.md
    └── README.md

Bugs and feature requests

Have a bug or a feature request? Please first search for existing and closed issues. If your problem or idea is not addressed yet, please open a new issue.

Contributing

If you wish to contribute to the project, you can submit your pull request, which will be validated and merged as soon as possible, or open an issue.

Creators

Ismael Bortoluzzi

Thanks

Thank you for taking a look at my project!

Copyright and license

Code released under the MIT License.

Enjoy

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Risc-V assembly interpreter built with pure Rust

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