Directory: choose other free way when refill way has conflict mshr entry, instead of refillRetry #103
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
…try, instead of refillRetry
Ivyfeather
approved these changes
Apr 2, 2024
linjuanZ
pushed a commit
that referenced
this pull request
Apr 3, 2024
…try, instead of refillRetry (#103) Co-authored-by: Cai Luoshan <cailuoshan18@mails.ucas.ac.cn>
cyyself
added a commit
to cyyself/CoupledL2
that referenced
this pull request
Apr 8, 2024
I have written 'tp.io.hartid := tpio.tpmeta_port.get.req.bits.hartid' before in OpenXiangShan#103. However, it is not the hartid that comes from tile but TemporalPrefetcher and caused a loop in Chisel.Queue, as it doesn't use flow, so we didn't see errors in FIRRTL but we will not get the right hartId. This commit fixes this by adding an io to the CoupledL2 module and using hartId input from the L2Top module. To get this done, we must modify L2Top.scala like this outside this repo. ```diff diff --git a/src/main/scala/xiangshan/L2Top.scala b/src/main/scala/xiangshan/L2Top.scala index b4865aba5..07d1668bb 100644 --- a/src/main/scala/xiangshan/L2Top.scala +++ b/src/main/scala/xiangshan/L2Top.scala @@ -144,6 +144,7 @@ class L2Top()(implicit p: Parameters) extends LazyModule if (l2cache.isDefined) { l2_hint := l2cache.get.module.io.l2_hint // debugTopDown <> l2cache.get.module.io.debugTopDown + l2cache.get.module.io.hartId := hartId.fromTile l2cache.get.module.io.debugTopDown.robHeadPaddr := DontCare l2cache.get.module.io.debugTopDown.robHeadPaddr.head := debugTopDown.robHeadPaddr debugTopDown.l2MissMatch := l2cache.get.module.io.debugTopDown.l2MissMatch.head ``` Finally, this commit also adds DontCare for this new signal to TestTop.scala. Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Ivyfeather
pushed a commit
that referenced
this pull request
Apr 9, 2024
* configs: fix use hartid from io (#102) I have written 'tp.io.hartid := tpio.tpmeta_port.get.req.bits.hartid' before in #103. However, it is not the hartid that comes from tile but TemporalPrefetcher and caused a loop in Chisel.Queue, as it doesn't use flow, so we didn't see errors in FIRRTL but we will not get the right hartId. This commit fixes this by adding an io to the CoupledL2 module and using hartId input from the L2Top module. To get this done, we must modify L2Top.scala like this outside this repo. ```diff diff --git a/src/main/scala/xiangshan/L2Top.scala b/src/main/scala/xiangshan/L2Top.scala index b4865aba5..07d1668bb 100644 --- a/src/main/scala/xiangshan/L2Top.scala +++ b/src/main/scala/xiangshan/L2Top.scala @@ -144,6 +144,7 @@ class L2Top()(implicit p: Parameters) extends LazyModule if (l2cache.isDefined) { l2_hint := l2cache.get.module.io.l2_hint // debugTopDown <> l2cache.get.module.io.debugTopDown + l2cache.get.module.io.hartId := hartId.fromTile l2cache.get.module.io.debugTopDown.robHeadPaddr := DontCare l2cache.get.module.io.debugTopDown.robHeadPaddr.head := debugTopDown.robHeadPaddr debugTopDown.l2MissMatch := l2cache.get.module.io.debugTopDown.l2MissMatch.head ``` Finally, this commit also adds DontCare for this new signal to TestTop.scala. Signed-off-by: Yangyu Chen <cyy@cyyself.name> * testtop: fix unconnected signals Signed-off-by: Yangyu Chen <cyy@cyyself.name> --------- Signed-off-by: Yangyu Chen <cyy@cyyself.name>
linjuanZ
pushed a commit
that referenced
this pull request
Apr 11, 2024
* configs: fix use hartid from io (#102) I have written 'tp.io.hartid := tpio.tpmeta_port.get.req.bits.hartid' before in #103. However, it is not the hartid that comes from tile but TemporalPrefetcher and caused a loop in Chisel.Queue, as it doesn't use flow, so we didn't see errors in FIRRTL but we will not get the right hartId. This commit fixes this by adding an io to the CoupledL2 module and using hartId input from the L2Top module. To get this done, we must modify L2Top.scala like this outside this repo. ```diff diff --git a/src/main/scala/xiangshan/L2Top.scala b/src/main/scala/xiangshan/L2Top.scala index b4865aba5..07d1668bb 100644 --- a/src/main/scala/xiangshan/L2Top.scala +++ b/src/main/scala/xiangshan/L2Top.scala @@ -144,6 +144,7 @@ class L2Top()(implicit p: Parameters) extends LazyModule if (l2cache.isDefined) { l2_hint := l2cache.get.module.io.l2_hint // debugTopDown <> l2cache.get.module.io.debugTopDown + l2cache.get.module.io.hartId := hartId.fromTile l2cache.get.module.io.debugTopDown.robHeadPaddr := DontCare l2cache.get.module.io.debugTopDown.robHeadPaddr.head := debugTopDown.robHeadPaddr debugTopDown.l2MissMatch := l2cache.get.module.io.debugTopDown.l2MissMatch.head ``` Finally, this commit also adds DontCare for this new signal to TestTop.scala. Signed-off-by: Yangyu Chen <cyy@cyyself.name> * testtop: fix unconnected signals Signed-off-by: Yangyu Chen <cyy@cyyself.name> --------- Signed-off-by: Yangyu Chen <cyy@cyyself.name>
# for free
to join this conversation on GitHub.
Already have an account?
# to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
No description provided.