4-Bit ALU System

Welcome to the 4-bit ALU system project! This project involves the design and implementation of a 4-bit Arithmetic Logic Unit (ALU) using VHDL programming. The ALU can perform a variety of arithmetic and logical operations essential for computer processors.

Table of Contents

• Overview
• Features
• Technologies Used
• Installation
• Usage
• Contributing
• License
• Acknowledgements

Overview

An Arithmetic Logic Unit (ALU) is a crucial component of a computer processor that performs arithmetic and logical operations on binary numbers. This project focuses on creating a simple 4-bit ALU that can execute various functions such as addition, subtraction, AND, OR, and XOR operations.

Features

• Addition: Perform binary addition of two 4-bit numbers.
• Subtraction: Perform binary subtraction of two 4-bit numbers.
• Logical AND: Execute bitwise AND operation on two 4-bit numbers.
• Logical OR: Execute bitwise OR operation on two 4-bit numbers.
• Logical XOR: Execute bitwise XOR operation on two 4-bit numbers.
• Zero Flag: Indicate if the result of an operation is zero.
• Overflow Flag: Indicate if there is an overflow in arithmetic operations.

Technologies Used

• VHDL: Hardware description language used for FPGA and ASIC design.
• Xilinx VIVADO: Software tool for synthesis and simulation of VHDL code.
• ModelSim: Simulation tool for verifying the functionality of the VHDL code.

OutPut

Installation

To set up this project locally, follow these steps:

1. Clone the repository:

   git clone https://github.com/Sabbir45ali/4-Bit-ALU-System.git

2. Navigate to the project directory:

   cd 4-bit-ALU-VHDL

3. Open the project in your preferred VHDL development environment (e.g., Xilinx ISE, ModelSim).

Usage

1. Simulation:

   • Open the VHDL files in your simulation tool (e.g., ModelSim).
   • Compile the VHDL files to check for syntax errors.
   • Run the simulation to verify the functionality of the ALU.

2. Synthesis:

   • Open the VHDL files in your synthesis tool (e.g., Xilinx ISE).
   • Synthesize the design to generate a bitstream file.
   • Upload the bitstream file to an FPGA to test the ALU in hardware.

Contributing

We welcome contributions to enhance the 4-bit ALU project. If you have suggestions or find any issues, please follow these steps:

1. Fork the repository.
2. Create a new branch:

   git checkout -b feature/YourFeature

3. Commit your changes:

   git commit -m 'Add some feature'

4. Push to the branch:

   git push origin feature/YourFeature

5. Open a pull request.

License

This project is licensed under the MIT License - see the LICENSE file for details.

Acknowledgements

We would like to thank our instructors and peers for their guidance and support. Special thanks to the online VHDL community for the valuable resources and tutorials that made this project possible.