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WRLinux LTS22 Base - marvell-cn106xx
WindRiverLinux22/marvell-cn106xx
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Marvell CN106XX BSP 1. About this document ====================== This document describes the common and non-hardware specific information. Please refer to README.hardware for hardware specific information. Dependencies ------------ This layer depends on the oe-core version supplied with linux-yocto kernel. Maintenance ----------- This layer is maintained by Wind River Systems, Inc. Contact <support@windriver.com> or your support representative for more information on submitting changes. Building the marvell-cn106xx layer ---------------------------------- This layer should be added to bblayers.conf. This is done automatically when using the Wind River setup.sh wrapper. License ------- Copyright (C) 2021 Wind River Systems, Inc. The right to copy, distribute or otherwise make use of this software may be licensed only pursuant to the terms of an applicable Wind River license agreement. No license to Wind River intellectual properly rights is granted herein. All rights not licensed by Wind River are reserved by Wind River. Source code included in tree for individual recipes is under the LICENSE stated in each recipe (.bb file) unless other stated. 2. BSP Kernel and Distros ========================= The following table summarizes the valid Wind River Linux distros for this BSP. 'Y' in each content cell stands for supported; 'N' stands for not supported: +--------------+-------------+-------------+-------------+ | valid/distro | wrlinux | wrlinux-cgl | wrlinux-ovp | +--------------+-------------+-------------+-------------+ | valid | Y | N | N | +--------------+-------------+-------------+-------------+ For the supported kernel type for this BSP, please check the TARGET_SUPPORTED_KTYPES by running 'bitbake -e virtual/kernel | grep "^TARGET_SUPPORTED_KTYPES="'. Note: The preempt-rt ktype is available for this BSP/Machine. 3. Board Specific Patches ========================= To get a list of patches applied to the kernel specific to this BSP along with patch descriptions use git whatchanged on the default kernel (git whatchanged <kernel_type>..<bsp_name>). For example: # cd tmp-glibc/work-shared/<bsp_name>/kernel-source # git whatchanged standard/base..standard/<machine name> 4. Boot Instructions ==================== The typical u-boot settings apply to these boards. You will need to use setenv, printenv and saveenv, to configure, display and store respectively your network configuration details and kernel command line. In order to TFTP a kernel, you need at a minimum to set the following: - ipaddr - gatewayip - netmask - serverip - loadaddr - ethaddr - eth1addr Your board may ship with the values for the MAC address of the Ethernet interfaces set to the defaults compiled into the u-boot image. You should set the ethaddr, eth1addr and so on as per the manufacturer assigned values, usually indicated with a sticker on the board. Target specifics are usually set in the "bootargs" variable, and the kernel image is set in the "bootfile" variable. Don't forget that if you want these values to be available after a power cycle you will need to run the saveenv command. Typically convenience macros exist that will create a complete bootargs command line for the kernel based on variables that contain individual settings. Since these macros exist as env variables themselves, they may or may not be present depending on who installed and configured u-boot for the board. The console device for the board is ttyAMA0 at 115200 baud. The load address must be high enough to not interfere with kernel decompression. A value of 0x040080000 was used with success for all kernels tested by Wind River. 4.1 NFS Root File System ------------------------ Example settings for the monitor (u-boot) are shown below: nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath \ ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off \ console=$consoledev,$baudrate $othbootargs;tftpboot $loadaddr $bootfile; \ booti $loadaddr - $fdtaddr ethaddr=00:04:9F:02:00:FD eth1addr=00:04:9F:02:01:FD eth2addr=00:04:9F:02:02:FD loadaddr=0x040080000 gatewayip=192.168.1.1 netmask=255.255.255.0 ipaddr=192.168.1.100 serverip=192.168.1.2 netdev=eth1 ethact=eth1 bootfile=Image rootpath=/tftpboot/rootfs consoledev=ttyAMA0 baudrate=115200 5. WIC Image ============ Please refer to the Yocto manual for the detailed info about WIC. After building the project, the WIC image is at: tmp-glibc/deploy/images/marvell-cn106xx/wrlinux-image-std-<machine name>.wic Then user can burn this image to eMMC on board. note: Due to hardware problems, SD card is not supported temporarily. 5.1 Burn the image to eMMC device ----------------------------- # dd if=wrlinux-image-std-<machine name>.wic of=/dev/your_emmc_dev bs=1M conv=fsync 5.2 Set uboot env for cn106xx ----------------------------- # fatload mmc 0:1 $loadaddr Image # setenv bootargs console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M iommu.passthrough=1 # booti $loadaddr - $fdtaddr 6. Multilib =========== By default, when you configure project with --enable-board=marvell-cn106xx, the BSP is configured as a 64-bit kernel and 64-bit userspace. Multilib is also supported by this BSP. 1. To add 32-bit multilib support for an existing project, use: bitbake lib32-wrlinux-image-std 2. To add 32-bit multilib support for a specific package, use: bitbake lib32-<pkg-name> 7. Switch CPSS demo =================== Due to the license issue, we can't provide either the CPSS source or binary package in Wind River Linux. If you really need this application, please follow the below steps to build the CPSS application: 1) Copy sources-cpss-SDK11.22.08.tar.bz2 from the SDK11 and put it to <bsp-layer>/downloads/ directory 2) Add line as follows to ${build dir}/conf/local.conf: $ cat << _EOF >> conf/local.conf PNWHITELIST:wr-marvell-cn106xx += "cpss" IMAGE_INSTALL:append = " cpss" _EOF 3) Build CPSS demo use 'bitbake cpss' or 'bitbake wrlinux-image-std' 4) Rpm package can be found in ${build dir}/tmp-glibc/deploy/rpm/neoversen2_crypto/ Example config for the cpss program is shown below, we can use 'appDemo -config cpss.conf' to configure switch function: $ cat << _EOF >> cpss.conf // InitSystem shell-execute appDemoDbEntryAdd "initPhy",0 shell-execute appDemoDbEntryAdd "noSdmaRxTxPP0",1 shell-execute appDemoDbEntryAdd "noCpu",1 shell-execute appDemoDbEntryAdd "initNetworkIf",0 autoInitSystem noPorts shell-execute nwa_disable_sdma2cpu_wa // Configure internal connection to 50G-R configure interface range ethernet 0/32,34,36 speed 50000 mode KR callCpssAPI cpssDxChSamplePortManagerSerdesTxParamsSet <<<PARAMS { { "IN", "GT_U8", "devNum", 0 }, { "IN", "GT_U32", "portNum", 32 }, { "IN", "GT_U32", "laneNum", 0 }, { "IN", "CPSS_PORT_SERDES_TX_CONFIG_STC", "portParamsInputStc", { txTune={ comphy_C56G={ post=0, main=35, pre=0, usr=true, pre2=0 } }, type="CPSS_PORT_SERDES_COMPHY_C56G_E" } } } >>> callCpssAPI cpssDxChSamplePortManagerSerdesTxParamsSet <<<PARAMS { { "IN", "GT_U8", "devNum", 0 }, { "IN", "GT_U32", "portNum", 34}, { "IN", "GT_U32", "laneNum", 0 }, { "IN", "CPSS_PORT_SERDES_TX_CONFIG_STC", "portParamsInputStc", { txTune={ comphy_C56G={ post=0, main=35, pre=0, usr=true, pre2=0 } }, type="CPSS_PORT_SERDES_COMPHY_C56G_E" } } } >>> callCpssAPI cpssDxChSamplePortManagerSerdesTxParamsSet <<<PARAMS { { "IN", "GT_U8", "devNum", 0 }, { "IN", "GT_U32", "portNum", 36 }, { "IN", "GT_U32", "laneNum", 0 }, { "IN", "CPSS_PORT_SERDES_TX_CONFIG_STC", "portParamsInputStc", { txTune={ comphy_C56G={ post=0, main=35, pre=0, usr=true, pre2=0 } }, type="CPSS_PORT_SERDES_COMPHY_C56G_E" } } } >>> no shutdown end // Configure J19/20/21 configure interface range ethernet 0/8 speed 40000 mode KR4 no shutdown exit interface range ethernet 0/6 speed 10000 mode KR no shutdown exit interface range ethernet 0/22 speed 10000 mode KR no shutdown exit _EOF 8. Coresight Support ==================== The following steps can be used to validate the coresight on cn106xx: 1. Enable h/w tracing on a given core and store data in ETR (where N is core number (0 - (MAX_CPUS - 1)): ~# echo 1 > /sys/bus/coresight/devices/tmc_etr0/enable_sink ~# echo 1 > /sys/bus/coresight/devices/<eteN>/enable_source 2. Capture trace data from the common ETR: ~# mkdir /root/otx2 ~# dd if=/dev/tmc_etr0 of=/root/otx2/cstrace.bin 3. Disable h/w tracing on a given core and store data in ETR (where N is core number (0 - (MAX_CPUS - 1)): ~# echo 0 > /sys/bus/coresight/devices/tmc_etr0/enable_sink ~# echo 0 > /sys/bus/coresight/devices/<eteN>/enable_source 4. Generate intermediate trace data from raw h/w trace data: ~# c_api_pkt_print_test -ss_path /root/ Take cpu core1 as an example, the commands and outputs are as follows: ~# cat /sys/bus/coresight/devices/ete1/ns_exlevel_vinst 0x0 ~# echo 1 >/sys/bus/coresight/devices/tmc_etr0/enable_sink ~# echo 1 >/sys/bus/coresight/devices/ete1/enable_source ~# taskset -c 0 ls /bin/ '[' lsattr '[[' lsblk aarch64-marvell-linux-gnu-ar lscpu aarch64-marvell-linux-gnu-as lsipc aarch64-marvell-linux-gnu-c++ lslocks aarch64-marvell-linux-gnu-g++ lsns aarch64-marvell-linux-gnu-gcc lsof ... ~# mkdir otx2 ~# dd if=/dev/tmc_etr0 of=/root/otx2/cstrace.bin 5455+2 records in 5456+0 records out 2793472 bytes (2.8 MB, 2.7 MiB) copied, 1.25005 s, 2.2 MB/s ~# echo 0 >/sys/bus/coresight/devices/tmc_etr0/enable_sink ~# echo 0 >/sys/bus/coresight/devices/ete1/enable_source ~# c_api_pkt_print_test -ss_path /root/ root@marvell-cn106xx:~# c_api_pkt_print_test -ss_path /root/ Decoding otx2 snapshot ... opening /root//otx2/cstrace.bin trace data file C-API packet print test Library Version 1.2.0 c_api_pkt_print_test -ss_path /root/ Idx:0; I_NOT_SYNC : I Stream not synchronised Idx:499; I_ASYNC : Alignment Synchronisation. Idx:511; I_TRACE_INFO : Trace Info.; INFO=0x0 { CC.0 } Idx:513; I_TRACE_INFO : Trace Info.; INFO=0x0 { CC.0 } Idx:515; I_ADDR_CTXT_L_64IS0 : Address & Context, Long, 64 bit, IS0.; Addr=0xFFFE800008D22EE8; Ctxt: AArch64,EL2, NS; Idx:525; I_ATOM_F2 : Atom format 2.; NE Idx:526; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0xFFFE80000A5142A4; Idx:531; I_CCNT_F1 : Cycle Count format 1.; Count=0xd0a5a Idx:537; I_ATOM_F2 : Atom format 2.; NE PKTP_ETMV4I : 0x0014 (OCSD_ERR_INVALID_PCKT_HDR) [Invalid packet header]; TrcIdx=538; CS ID=10; Idx:538; I_RESERVED : Reserved Packet Header Idx:539; I_ATOM_F5 : Atom format 5.; NENEN PKTP_ETMV4I : 0x0014 (OCSD_ERR_INVALID_PCKT_HDR) [Invalid packet header]; TrcIdx=540; CS ID=10; Idx:540; I_RESERVED : Reserved Packet Header Idx:541; I_ATOM_F3 : Atom format 3.; EEN Idx:542; I_ATOM_F6 : Atom format 6.; EEEEEN ... 9. EDAC/GHES Support ==================== The following steps can be used to validate the EDAC/GHES on cn106xx: ~# echo 0x2fffff000 > /sys/devices/system/edac/mc/mc0/address ~# echo 0x20000001 > /sys/devices/system/edac/mc/mc0/error_type ~# echo 1 > /sys/devices/system/edac/mc/mc0/inject An example output is as follows: EDAC octeontx-edac-ghes: octeontx_edac_mc_inject c2000b10 d 2fffff000 0 1 0 0 0 EDAC octeontx-edac-ghes: octeontx_edac_mc_inject: (c2000b10, d, 2fffff000, 0) -> e?0
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