AVX: enc: add inline asm codepath #108
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aklomp
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Oct 19, 2022
Issue #104 introduced an inline assembly version of the AVX2 base64 encoder. It turns out that we can reuse this implementation almost verbatim for AVX if we replace the 256-bit AVX2 registers with 128-bit AVX registers. Some small changes are needed, such as changing the stride widths and removing the special handling of the first round, but overall the code remains the same. Tested with the Intel SDE instruction set emulator running in Sandy Bridge mode (with AVX, but no AVX2). Resolves #108.
aklomp
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encoder. It turns out that we can reuse this implementation almost verbatim for AVX if we replace the 256-bit AVX2 registers with 128-bit AVX registers. Some small changes are needed, such as changing the stride widths and removing the special handling of the first round, but overall the code remains the same. Tested with the Intel SDE instruction set emulator running in Sandy Bridge mode (with AVX, but no AVX2). Resolves #108.
aklomp
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this issue
Oct 19, 2022
Issue #104 introduced an inline assembly version of the AVX2 base64 encoder. It turns out that we can reuse this implementation almost verbatim for AVX if we replace the 256-bit AVX2 registers with 128-bit AVX registers. Some small changes are needed, such as changing the stride widths and removing the special handling of the first round, but overall the code remains the same. Tested with the Intel SDE instruction set emulator running in Sandy Bridge mode (with AVX, but no AVX2). Resolves #108.
aklomp
added a commit
that referenced
this issue
Oct 19, 2022
Issue #104 introduced an inline assembly version of the AVX2 base64 encoder. It turns out that we can reuse this implementation almost verbatim for AVX if we replace the 256-bit AVX2 registers with 128-bit AVX registers. Some small changes are needed, such as changing the stride widths and removing the special handling of the first round, but overall the code remains the same. Tested with the Intel SDE instruction set emulator running in Sandy Bridge mode (with AVX, but no AVX2). Resolves #108.
aklomp
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aklomp
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Oct 22, 2022
Disable the inline assembly codepath on 32-bit x86 (known as x86-32 or i686), because the 32-bit x86 architecture only has eight XMM registers, which is not enough to run the code. Since this was not caught in CI before merging #104 and #108, add a test to compile the library on i686. Resolves #110.
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Issue #104 introduced an inline assembly version of the AVX2 base64 encoder. It turns out that we can reuse this implementation almost verbatim for AVX if we replace the 256-bit AVX2 registers with 128-bit AVX registers. Some small changes are needed, such as changing the stride widths and removing the special handling of the first round, but overall the code remains the same.
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