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vendor._siliconblue: fix differential input. [0.5 backport] #1568

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Mar 4, 2025
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vendor._siliconblue: fix differential input. [0.5 backport] #1568

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6 changes: 5 additions & 1 deletion amaranth/vendor/_siliconblue.py
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Original file line number Diff line number Diff line change
Expand Up @@ -568,6 +568,10 @@ def get_io_buffer(self, buffer):
raise TypeError("iCE40 does not support bidirectional differential ports")
elif buffer.direction is io.Direction.Output:
m = Module()
# Note that the non-inverting output pin is not driven the same way as a regular
# output pin. The inverter introduces a delay, so for a non-inverting output pin,
# an identical delay is introduced by instantiating a LUT. This makes the waveform
# perfectly symmetric in the xdr=0 case.
invert_lut = isinstance(buffer, io.Buffer)
m.submodules.p = self._get_io_buffer_single(buffer, port_p, invert_lut=invert_lut)
m.submodules.n = self._get_io_buffer_single(buffer, port_n, invert_lut=invert_lut)
Expand All @@ -578,7 +582,7 @@ def get_io_buffer(self, buffer):
# differs between LP/HX and UP series:
# * for LP/HX, z=0 is DPxxB (B is non-inverting, A is inverting)
# * for UP, z=0 is IOB_xxA (A is non-inverting, B is inverting)
return self._get_io_buffer_single(buffer, port_p, invert_lut=invert_lut)
return self._get_io_buffer_single(buffer, port_p)
else:
assert False # :nocov:
elif isinstance(buffer.port, io.SingleEndedPort):
Expand Down