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dts: fxblox remove sd pwr gpio and correct bt wake gpio #286

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Nov 12, 2024
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15 changes: 6 additions & 9 deletions arch/arm64/boot/dts/rockchip/rk3588-fxblox-rk1.dts
Original file line number Diff line number Diff line change
Expand Up @@ -498,16 +498,18 @@
};

&sdmmc {
max-frequency = <150000000>;
max-frequency = <200000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
//vmmc-supply = <&vcc_3v3_sd_s3>;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
status = "okay";
};

Expand Down Expand Up @@ -1129,7 +1131,7 @@
// pcie3x4
&pcie3x4 {
reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
//vpcie3v3-supply = <&vcc3v3_pcie30>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};

Expand Down Expand Up @@ -1292,19 +1294,14 @@
};

bt_host_wake_l: bt-host-wake-l {
rockchip,pins = <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};

bt_wake_l: bt-wake-l {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

sdmmc {
sd_s0_pwr: sd-s0-pwr {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

&edp0 {
Expand Down