Improve the architecture of SpiFuture

After trying to use `SpiFuture` in the real world, I encountered some
problems that these changes address. Specifically, I added the ability
for the `Spi` struct to be part of some user type. The `AsSpi` trait
provides an interface for the `SpiFuture`. This has the added benefit of
simplifying the implementation.

hal/CHANGELOG.md

@@ -1,5 +1,6 @@
 # Unreleased Changes
 
+- Improve the architecture of `SpiFuture` (#577)
 - Update `seq_macro` and remove `replace_with` dependencies (#568)
 - Add a `bsp_peripherals!` macro and fix a bug in `bsp_pins!` (#515)
 - Updated to 2021 edition, updated dependencies, removed unused dependencies (#562)

hal/src/sercom/v2/spi.rs

@@ -779,6 +779,31 @@ where
         self.change()
     }
 
+    /// Return the transaction length, in bytes
+    ///
+    /// This function is valid for all chips and SPI configurations. It returns
+    /// the number of bytes in a single SPI transaction.
+    #[cfg(any(feature = "samd11", feature = "samd21"))]
+    #[inline]
+    pub fn transaction_length(&self) -> u8 {
+        Z::BYTES
+    }
+
+    /// Return the transaction length, in bytes
+    ///
+    /// This function is valid for all chips and SPI configurations. It returns
+    /// the number of bytes in a single SPI transaction.
+    #[cfg(feature = "min-samd51g")]
+    #[inline]
+    pub fn transaction_length(&self) -> u8 {
+        use typenum::Unsigned;
+        if Z::U8 == DynLength::U8 {
+            self.regs.get_length()
+        } else {
+            Z::U8
+        }
+    }
+
     /// Get the clock polarity
     #[inline]
     pub fn get_cpol(&self) -> Polarity {
@@ -1178,6 +1203,15 @@ where
         }
     }
 
+    /// Return the transaction length, in bytes
+    ///
+    /// This function is valid for all chips and SPI configurations. It returns
+    /// the number of bytes in a single SPI transaction.
+    #[inline]
+    pub fn transaction_length(&self) -> u8 {
+        self.config.as_ref().transaction_length()
+    }
+
     /// Update the SPI configuration.
     ///
     /// Calling this method will temporarily disable the SERCOM peripheral, as

hal/src/sercom/v2/spi/char_size.rs

@@ -28,6 +28,9 @@ pub trait CharSize: Sealed {
 
     /// Register bit pattern for the corresponding `CharSize`
     const BITS: u8;
+
+    /// Number of bytes in an SPI transaction
+    const BYTES: u8;
 }
 
 /// Type alias to recover the [`Word`](CharSize::Word) type from an
@@ -44,10 +47,12 @@ impl Sealed for EightBit {}
 impl CharSize for EightBit {
     type Word = u8;
     const BITS: u8 = 0;
+    const BYTES: u8 = 1;
 }
 
 impl Sealed for NineBit {}
 impl CharSize for NineBit {
     type Word = u16;
     const BITS: u8 = 1;
+    const BYTES: u8 = 2;
 }