fix rebae quirks

bytecodealliance · Jan 16, 2025 · 3324880 · 3324880
1 parent f92dffc
commit 3324880
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Showing 3 changed files with 13 additions and 18 deletions.
diff --git a/winch/codegen/src/isa/x64/masm.rs b/winch/codegen/src/isa/x64/masm.rs
@@ -1340,7 +1340,7 @@ impl Masm for MacroAssembler {
                     RmwOp::And => AtomicRmwSeqOp::And,
                     RmwOp::Or => AtomicRmwSeqOp::Or,
                     RmwOp::Xor => AtomicRmwSeqOp::Xor,
-                    RmwOp::Add => unreachable!(
+                    _ => unreachable!(
                         "invalid op for atomic_rmw_seq, should be one of `or`, `and` or `xor`"
                     ),
                 };

diff --git a/winch/codegen/src/masm.rs b/winch/codegen/src/masm.rs
@@ -255,20 +255,6 @@ impl ExtendKind {
             Self::I32Extend8S | Self::I32Extend8U | Self::I32Extend16U | Self::I32Extend16S => 32,
         }
     }
-
-    pub fn src_operand_size(&self) -> OperandSize {
-        match self {
-            ExtendKind::I32Extend8S
-            | ExtendKind::I32Extend8U
-            | ExtendKind::I64Extend8S
-            | ExtendKind::I64Extend8U => OperandSize::S8,
-            ExtendKind::I32Extend16S
-            | ExtendKind::I32Extend16U
-            | ExtendKind::I64Extend16U
-            | ExtendKind::I64Extend16S => OperandSize::S16,
-            ExtendKind::I64Extend32U | ExtendKind::I64Extend32S => OperandSize::S32,
-        }
-    }
 }
 
 /// Kinds of vector extends in WebAssembly. Each MacroAssembler implementation
@@ -337,7 +323,17 @@ impl LoadKind {
     }
 
     fn operand_size_for_scalar(extend_kind: &ExtendKind) -> OperandSize {
-        extend_kind.src_operand_size()
+        match extend_kind {
+            ExtendKind::I32Extend8S
+            | ExtendKind::I32Extend8U
+            | ExtendKind::I64Extend8S
+            | ExtendKind::I64Extend8U => OperandSize::S8,
+            ExtendKind::I32Extend16S
+            | ExtendKind::I32Extend16U
+            | ExtendKind::I64Extend16U
+            | ExtendKind::I64Extend16S => OperandSize::S16,
+            ExtendKind::I64Extend32U | ExtendKind::I64Extend32S => OperandSize::S32,
+        }
     }
 
     fn operand_size_for_splat(kind: &SplatKind) -> OperandSize {

diff --git a/winch/codegen/src/visitor.rs b/winch/codegen/src/visitor.rs
@@ -2391,7 +2391,7 @@ where
             &arg,
             RmwOp::Sub,
             OperandSize::S8,
-            Some(ExtendKind::I32Extend8U),
+            Some(ExtendKind::I64Extend8U),
         )
     }
 
@@ -2471,7 +2471,6 @@ where
     }
 
     fn visit_i32_atomic_rmw8_or_u(&mut self, arg: MemArg) -> Self::Output {
-        dbg!();
         self.emit_atomic_rmw(
             &arg,
             RmwOp::Or,