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Verilog generation runs indefinitely #2834
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The compilation gets stuck in an infinite loop when calling normalizeTopLvlBndr on Click here to see the term that is bound to
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Moving the local definitions to the top level also seems to solve the issue, as the following terminates as expected type Size = 2
topEntity :: Bit
topEntity = head lookupTable
lookupTable :: Vec Size Bit
lookupTable = smap fill $ repeat ()
fill :: forall n. SNat n -> () -> Bit
fill n@(SNat :: SNat n) _ = case compareSNat n (SNat @0) of
SNatLE -> low
SNatGT -> case compareSNat n (SNat @Size) of
SNatLE -> at @(n - 1) @(Size - n) SNat lookupTable
SNatGT -> error "impossible" |
Adding a |
The problem again seems to start in the same place as #2831 (comment) Where
because the subject of the case expression is not a data constructor nor a primitive. As a result, the Clash compiler will evaluate both the subject and the alternatives in "parallel". This then causes the |
Clash seems to diverge on the following reproducer (if being called with the
--verilog
flag).The text was updated successfully, but these errors were encountered: