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319 Open 674 Closed
319 Open 674 Closed
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Issues list

NO_TRANSLATION_FOR
#2878 opened Jan 22, 2025 by kleinreact
1
Internal error: unknown normalized binder
#2877 opened Jan 17, 2025 by gergoerdi
2
clashCompilerError leads to synthesis failure, even though it should be on a branch not taken
#2870 opened Jan 4, 2025 by gergoerdi
23
1.8.2 doesn't have a Counter instance for Maybe a
#2867 opened Jan 4, 2025 by gergoerdi
3
Quartus SystemVerilog: error on input port typedef and net type
#2855 opened Dec 16, 2024 by DigitalBrains1
1
Clash.Intel.DDR: Quartus Verilog errors on uselib macro
#2854 opened Dec 14, 2024 by DigitalBrains1
enumFrom errors for Index 0 bug
#2851 opened Nov 27, 2024 by kleinreact
4
Multiple guards leads to less efficient HDL than single guard of conjunction
#2842 opened Nov 12, 2024 by gergoerdi
6
Xilinx DDR output: Haskell model wrong for Enable
#2840 opened Nov 6, 2024 by DigitalBrains1
3
Create a changelog entry for https://github.com/clash-lang/clash-compiler/pull/2825
#2838 opened Nov 2, 2024 by christiaanb
Differences between shiftInAt0 and shiftInAtN
#2836 opened Oct 30, 2024 by kleinreact
2
Verilog generation runs indefinitely bug
#2834 opened Oct 28, 2024 by kleinreact
4
clash-spec-limit needs to grow exponentially
#2832 opened Oct 23, 2024 by kleinreact
vecToTuple not needed anymore discussion
#2830 opened Oct 21, 2024 by leonschoorl
3
SaturatingNum Bit
#2827 opened Oct 10, 2024 by gergoerdi
7
Error compiling clash-ghc 1.8.1 on Debian with GHC 9.6.6
#2823 opened Oct 8, 2024 by swt2c
2
Boolean versions of bitwise reductions
#2821 opened Oct 7, 2024 by gergoerdi
1
"Other error: divide by zero" on input file bug
#2815 opened Oct 1, 2024 by kleinreact
Derived Applicative instance causes synthesis speed to blow up
#2814 opened Sep 30, 2024 by gergoerdi
7
The power of Index bug
#2813 opened Sep 27, 2024 by kleinreact
1
1
zipEqual: left list is longer
#2812 opened Sep 26, 2024 by kleinreact
3
Clash can't represent 300 MHz exactly
#2811 opened Sep 24, 2024 by martijnbastiaan
1
Verilog and System Verilog code gen bug for map head
#2809 opened Sep 10, 2024 by basile-henry
1
Spine-lazy vector functions
#2808 opened Sep 8, 2024 by gergoerdi
4
tuple3_0_sel0_std_logic_vector is not declared
#2807 opened Sep 7, 2024 by DigitalBrains1
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