Misra 10.4: Both operands of an operator in which the usual arithmetic conversions are performed shall have the same essential type category (#240)

* Almost done with 10.4, a couple of non-obvious violations remaining

Author: rbiasini

board/config.h

@@ -34,7 +34,7 @@
      __typeof__ (b) _b = (b); \
    (_a > _b) ? _a : _b; })
 
-#define MAX_RESP_LEN 0x40
+#define MAX_RESP_LEN 0x40U
 
 #endif
 

board/drivers/can.h

@@ -12,7 +12,7 @@ typedef struct {
 #define CAN_BUS_RET_FLAG 0x80U
 #define CAN_BUS_NUM_MASK 0x7FU
 
-#define BUS_MAX 4
+#define BUS_MAX 4U
 
 extern int can_live, pending_can_live;
 
@@ -63,8 +63,11 @@ bool can_pop(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) {
   enter_critical_section();
   if (q->w_ptr != q->r_ptr) {
     *elem = q->elems[q->r_ptr];
-    if ((q->r_ptr + 1) == q->fifo_size) q->r_ptr = 0;
-    else q->r_ptr += 1;
+    if ((q->r_ptr + 1U) == q->fifo_size) {
+      q->r_ptr = 0;
+    } else {
+      q->r_ptr += 1U;
+    }
     ret = 1;
   }
   exit_critical_section();
@@ -77,8 +80,11 @@ bool can_push(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) {
   uint32_t next_w_ptr;
 
   enter_critical_section();
-  if ((q->w_ptr + 1) == q->fifo_size) next_w_ptr = 0;
-  else next_w_ptr = q->w_ptr + 1;
+  if ((q->w_ptr + 1U) == q->fifo_size) {
+    next_w_ptr = 0;
+  } else {
+    next_w_ptr = q->w_ptr + 1U;
+  }
   if (next_w_ptr != q->r_ptr) {
     q->elems[q->w_ptr] = *elem;
     q->w_ptr = next_w_ptr;
@@ -130,15 +136,15 @@ void can_set_speed(uint8_t can_number) {
   CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
   uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
 
-  if (!llcan_set_speed(CAN, can_speed[bus_number], can_loopback, can_silent & (1U << can_number))) {
+  if (!llcan_set_speed(CAN, can_speed[bus_number], can_loopback, (unsigned int)(can_silent) & (1U << can_number))) {
     puts("CAN init FAILED!!!!!\n");
     puth(can_number); puts(" ");
     puth(BUS_NUM_FROM_CAN_NUM(can_number)); puts("\n");
   }
 }
 
 void can_init(uint8_t can_number) {
-  if (can_number != 0xff) {
+  if (can_number != 0xffU) {
     CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
     set_can_enable(CAN, 1);
     can_set_speed(can_number);
@@ -229,7 +235,7 @@ void can_sce(CAN_TypeDef *CAN) {
 // ***************************** CAN *****************************
 
 void process_can(uint8_t can_number) {
-  if (can_number != 0xff) {
+  if (can_number != 0xffU) {
 
     enter_critical_section();
 
@@ -343,7 +349,7 @@ void can_send(CAN_FIFOMailBox_TypeDef *to_push, uint8_t bus_number) {
       // add CAN packet to send queue
       // bus number isn't passed through
       to_push->RDTR &= 0xF;
-      if ((bus_number == 3) && (can_num_lookup[3] == 0xFF)) {
+      if ((bus_number == 3U) && (can_num_lookup[3] == 0xFFU)) {
         // TODO: why uint8 bro? only int8?
         bitbang_gmlan(to_push);
       } else {

board/drivers/gmlan_alt.h

@@ -44,7 +44,7 @@ int append_crc(char *in, int in_len) {
   unsigned int crc = 0;
   for (int i = 0; i < in_len; i++) {
     crc <<= 1;
-    if ((in[i] ^ ((crc >> 15) & 1U)) != 0) {
+    if ((in[i] ^ ((crc >> 15) & 1U)) != 0U) {
       crc = crc ^ 0x4599U;
     }
     crc &= 0x7fffU;
@@ -95,7 +95,7 @@ int get_bit_message(char *out, CAN_FIFOMailBox_TypeDef *to_bang) {
     // extended identifier
     len = append_int(pkt, len, to_bang->RIR >> 21, 11);  // Identifier
     len = append_int(pkt, len, 3, 2);    // SRR+IDE
-    len = append_int(pkt, len, (to_bang->RIR >> 3) & ((1U << 18) - 1), 18);  // Identifier
+    len = append_int(pkt, len, (to_bang->RIR >> 3) & ((1U << 18) - 1U), 18);  // Identifier
     len = append_int(pkt, len, 0, 3);    // RTR+r1+r0
   } else {
     // standard identifier

board/drivers/llcan.h

@@ -1,12 +1,12 @@
 // this is needed for 1 mbps support
-#define CAN_QUANTA 8
+#define CAN_QUANTA 8U
 #define CAN_SEQ1 6 // roundf(quanta * 0.875f) - 1;
 #define CAN_SEQ2 1 // roundf(quanta * 0.125f);
 
-#define CAN_PCLK 24000
+#define CAN_PCLK 24000U
 // 333 = 33.3 kbps
 // 5000 = 500 kbps
-#define can_speed_to_prescaler(x) (CAN_PCLK / CAN_QUANTA * 10 / (x))
+#define can_speed_to_prescaler(x) (CAN_PCLK / CAN_QUANTA * 10U / (x))
 
 void puts(const char *a);
 
@@ -18,7 +18,7 @@ bool llcan_set_speed(CAN_TypeDef *CAN, uint32_t speed, bool loopback, bool silen
   // set time quanta from defines
   CAN->BTR = (CAN_BTR_TS1_0 * (CAN_SEQ1-1)) |
             (CAN_BTR_TS2_0 * (CAN_SEQ2-1)) |
-            (can_speed_to_prescaler(speed) - 1);
+            (can_speed_to_prescaler(speed) - 1U);
 
   // silent loopback mode for debugging
   if (loopback) {
@@ -51,7 +51,7 @@ void llcan_init(CAN_TypeDef *CAN) {
   CAN->sFilterRegister[0].FR2 = 0;
   CAN->sFilterRegister[14].FR1 = 0;
   CAN->sFilterRegister[14].FR2 = 0;
-  CAN->FA1R |= 1 | (1U << 14);
+  CAN->FA1R |= 1U | (1U << 14);
 
   CAN->FMR &= ~(CAN_FMR_FINIT);
 

board/drivers/spi.h

@@ -113,12 +113,12 @@ void DMA2_Stream3_IRQHandler(void) {
 }
 
 void EXTI4_IRQHandler(void) {
-  volatile int pr = EXTI->PR & (1U << 4);
+  volatile unsigned int pr = EXTI->PR & (1U << 4);
   #ifdef DEBUG_SPI
     puts("exti4\n");
   #endif
   // SPI CS falling
-  if ((pr & (1U << 4)) != 0) {
+  if ((pr & (1U << 4)) != 0U) {
     spi_total_count = 0;
     spi_rx_dma(spi_buf, 0x14);
   }

board/drivers/uart.h

@@ -1,6 +1,6 @@
 // IRQs: USART1, USART2, USART3, UART5
 
-#define FIFO_SIZE 0x400
+#define FIFO_SIZE 0x400U
 typedef struct uart_ring {
   volatile uint16_t w_ptr_tx;
   volatile uint16_t r_ptr_tx;
@@ -81,7 +81,7 @@ void uart_ring_process(uart_ring *q) {
   if (q->w_ptr_tx != q->r_ptr_tx) {
     if ((sr & USART_SR_TXE) != 0) {
       q->uart->DR = q->elems_tx[q->r_ptr_tx];
-      q->r_ptr_tx = (q->r_ptr_tx + 1) % FIFO_SIZE;
+      q->r_ptr_tx = (q->r_ptr_tx + 1U) % FIFO_SIZE;
     }
     // there could be more to send
     q->uart->CR1 |= USART_CR1_TXEIE;
@@ -93,7 +93,7 @@ void uart_ring_process(uart_ring *q) {
   if ((sr & USART_SR_RXNE) || (sr & USART_SR_ORE)) {
     uint8_t c = q->uart->DR;  // TODO: can drop packets
     if (q != &esp_ring) {
-      uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
+      uint16_t next_w_ptr = (q->w_ptr_rx + 1U) % FIFO_SIZE;
       if (next_w_ptr != q->r_ptr_rx) {
         q->elems_rx[q->w_ptr_rx] = c;
         q->w_ptr_rx = next_w_ptr;
@@ -124,7 +124,7 @@ bool getc(uart_ring *q, char *elem) {
   enter_critical_section();
   if (q->w_ptr_rx != q->r_ptr_rx) {
     if (elem != NULL) *elem = q->elems_rx[q->r_ptr_rx];
-    q->r_ptr_rx = (q->r_ptr_rx + 1) % FIFO_SIZE;
+    q->r_ptr_rx = (q->r_ptr_rx + 1U) % FIFO_SIZE;
     ret = true;
   }
   exit_critical_section();
@@ -137,7 +137,7 @@ bool injectc(uart_ring *q, char elem) {
   uint16_t next_w_ptr;
 
   enter_critical_section();
-  next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
+  next_w_ptr = (q->w_ptr_rx + 1U) % FIFO_SIZE;
   if (next_w_ptr != q->r_ptr_rx) {
     q->elems_rx[q->w_ptr_rx] = elem;
     q->w_ptr_rx = next_w_ptr;
@@ -153,7 +153,7 @@ bool putc(uart_ring *q, char elem) {
   uint16_t next_w_ptr;
 
   enter_critical_section();
-  next_w_ptr = (q->w_ptr_tx + 1) % FIFO_SIZE;
+  next_w_ptr = (q->w_ptr_tx + 1U) % FIFO_SIZE;
   if (next_w_ptr != q->r_ptr_tx) {
     q->elems_tx[q->w_ptr_tx] = elem;
     q->w_ptr_tx = next_w_ptr;
@@ -195,10 +195,10 @@ void clear_uart_buff(uart_ring *q) {
 
 // ***************************** start UART code *****************************
 
-#define __DIV(_PCLK_, _BAUD_)                        (((_PCLK_) * 25) / (4 * (_BAUD_)))
-#define __DIVMANT(_PCLK_, _BAUD_)                    (__DIV((_PCLK_), (_BAUD_)) / 100)
-#define __DIVFRAQ(_PCLK_, _BAUD_)                    ((((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16) + 50) / 100)
-#define __USART_BRR(_PCLK_, _BAUD_)              ((__DIVMANT((_PCLK_), (_BAUD_)) << 4) | (__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
+#define __DIV(_PCLK_, _BAUD_)                        (((_PCLK_) * 25U) / (4U * (_BAUD_)))
+#define __DIVMANT(_PCLK_, _BAUD_)                    (__DIV((_PCLK_), (_BAUD_)) / 100U)
+#define __DIVFRAQ(_PCLK_, _BAUD_)                    ((((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U)
+#define __USART_BRR(_PCLK_, _BAUD_)              ((__DIVMANT((_PCLK_), (_BAUD_)) << 4) | (__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU))
 
 void uart_set_baud(USART_TypeDef *u, unsigned int baud) {
   if (u == USART1) {
@@ -226,7 +226,7 @@ void uart_dma_drain(void) {
     unsigned int i;
     for (i = 0; i < (USART1_DMA_LEN - DMA2_Stream5->NDTR); i++) {
       char c = usart1_dma[i];
-      uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
+      uint16_t next_w_ptr = (q->w_ptr_rx + 1U) % FIFO_SIZE;
       if (next_w_ptr != q->r_ptr_rx) {
         q->elems_rx[q->w_ptr_rx] = c;
         q->w_ptr_rx = next_w_ptr;
@@ -322,11 +322,11 @@ void putui(uint32_t i) {
   str[idx] = '\0';
   idx--;
   do {
-    str[idx] = (i_copy % 10) + 0x30;
+    str[idx] = (i_copy % 10U) + 0x30U;
     idx--;
     i_copy /= 10;
-  } while (i_copy != 0);
-  puts(str + idx + 1);
+  } while (i_copy != 0U);
+  puts(str + idx + 1U);
 }
 
 void puth(unsigned int i) {

board/drivers/usb.h

@@ -394,8 +394,8 @@ int current_int0_alt_setting = 0;
 // packet read and write
 
 void *USB_ReadPacket(void *dest, uint16_t len) {
-  uint32_t i=0;
-  uint32_t count32b = (len + 3) / 4;
+  uint32_t i = 0;
+  uint32_t count32b = (len + 3U) / 4U;
 
   for ( i = 0; i < count32b; i++) {
     // packed?
@@ -411,9 +411,9 @@ void USB_WritePacket(const uint8_t *src, uint16_t len, uint32_t ep) {
   hexdump(src, len);
   #endif
 
-  uint8_t numpacket = (len+(MAX_RESP_LEN-1))/MAX_RESP_LEN;
+  uint8_t numpacket = (len + (MAX_RESP_LEN - 1U)) / MAX_RESP_LEN;
   uint32_t count32b = 0, i = 0;
-  count32b = (len + 3) / 4;
+  count32b = (len + 3U) / 4U;
 
   // bullshit
   USBx_INEP(ep)->DIEPTSIZ = ((numpacket << 19) & USB_OTG_DIEPTSIZ_PKTCNT) |
@@ -983,12 +983,12 @@ void usb_irqhandler(void) {
       puts("  IN PACKET QUEUE\n");
       #endif
 
-      if ((ep0_txlen != 0) && ((USBx_INEP(0)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= 0x40)) {
+      if ((ep0_txlen != 0U) && ((USBx_INEP(0)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= 0x40U)) {
         uint16_t len = MIN(ep0_txlen, 0x40);
         USB_WritePacket(ep0_txdata, len, 0);
         ep0_txdata += len;
         ep0_txlen -= len;
-        if (ep0_txlen == 0) {
+        if (ep0_txlen == 0U) {
           ep0_txdata = NULL;
           USBx_DEVICE->DIEPEMPMSK &= ~1;
           USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;

board/gpio.h

@@ -410,9 +410,13 @@ void early(void) {
   // if wrong chip, reboot
   volatile unsigned int id = DBGMCU->IDCODE;
   #ifdef STM32F4
-    if ((id&0xFFF) != 0x463) enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC;
+    if ((id & 0xFFFU) != 0x463U) {
+      enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC;
+    }
   #else
-    if ((id&0xFFF) != 0x411) enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC;
+    if ((id & 0xFFFU) != 0x411U) {
+      enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC;
+    }
   #endif
 
   // setup interrupt table