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Pull requests list

introduce SMV enumeration type SMV
#1154 opened Jun 12, 2025 by kroening • Draft
KNOWNBUG test for $past with hierarchical identifier Tests Verilog
#1153 opened Jun 12, 2025 by kroening Loading…
KNOWNBUG test for hierarchical identifier with block scope Tests Verilog
#1152 opened Jun 12, 2025 by kroening Loading…
Homebrew formulas for ebmc 5.5 and 5.6
#1151 opened Jun 10, 2025 by kroening Loading…
Verilog: fix for named generate block scopes bug Verilog
#1150 opened Jun 10, 2025 by kroening Loading…
Verilog: $isunknown Verilog
#1149 opened Jun 9, 2025 by kroening • Draft
Verilog: constant folding for $onehot and $onehot0 Verilog
#1148 opened Jun 9, 2025 by kroening Loading…
NeurIPS 2025 SystemVerilog benchmarks
#1147 opened Jun 6, 2025 by kroening Loading…
fixup i2c_*.sv SVA
#1146 opened Jun 6, 2025 by kroening Loading…
Test for SVA empty match and followed-by operator Tests Verilog
#1145 opened Jun 6, 2025 by kroening Loading…
add sequence_matcht::condition() cleanup engines
#1144 opened Jun 5, 2025 by kroening Loading…
SMV: disallow next(...) in INVAR SMV
#1143 opened Jun 5, 2025 by kroening Loading…
SVA-to-Buechi: fix [+] engines
#1142 opened Jun 5, 2025 by kroening • Draft
remove ltl_sva_to_stringt::resultt::e cleanup
#1141 opened Jun 4, 2025 by kroening Loading…
BMC: completeness thresholds larger than one engines
#1115 opened May 18, 2025 by kroening • Draft
SMV: bit selection operator SMV
#1113 opened May 18, 2025 by kroening • Draft
introduce verilog_sva_property_typet Verilog
#1081 opened Apr 23, 2025 by kroening • Draft
SMV: expression typechecker now post-traversal SMV
#1040 opened Mar 28, 2025 by kroening Loading…
2
SVA monitor engines Verilog
#1011 opened Feb 25, 2025 by kroening • Draft
SystemVerilog: --initial-zero Verilog
#1001 opened Feb 20, 2025 by kroening Loading…
6
SystemVerilog: interface instantiation Verilog
#972 opened Feb 6, 2025 by kroening • Draft
SystemVerilog: declarations in named blocks in tasks/functions Verilog
#970 opened Feb 6, 2025 by kroening • Draft
1
SystemVerilog: preserve scopes between compilation units Verilog
#963 opened Feb 4, 2025 by kroening • Draft
SystemVerilog: create identifier expressions in scanner Verilog
#953 opened Jan 29, 2025 by kroening • Draft
Add chipsalliance/sv-tests to CI
#939 opened Jan 17, 2025 by kroening • Draft
ProTip! Updated in the last three days: updated:>2025-06-12.