JIT: Always look for SIMD fields during promotion

[jakobbotsch]

Fix #83749

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Issue Details

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Fix #83749

Author:	jakobbotsch
Assignees:	-
Labels:	area-CodeGen-coreclr
Milestone:	-

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[tannergooding]

@jakobbotsch, was there something blocking or preventing this from being merged?

[jakobbotsch]

@tannergooding There were some failures that I needed to figure out if were related or not.

[jakobbotsch]

The failing case is with JitStressRegs=2:

[11:07:52] ISSUE: <ASSERT> #411709 D:\a\_work\1\s\src\coreclr\jit\emit.h (1171) - Assertion failed 'reg == _idReg1' in 'JIT.HardwareIntrinsics.Arm._AdvSimd.SimpleTernaryOpTest__AbsoluteDifferenceAdd_Vector128_UInt32+TestStruct:Create():JIT.HardwareIntrinsics.Arm._AdvSimd.SimpleTernaryOpTest__AbsoluteDifferenceAdd_Vector128_UInt32+TestStruct' during 'Generate code' (IL size 208; hash 0xa860f440; FullOpts)

We have the following multireg tree that needs to be unspilled before a return:

N447 (  9,  6) [000090] m------N--z                   t90 =    LCL_VAR   struct<JIT.HardwareIntrinsics.Arm._AdvSimd.SimpleTernaryOpTest__AbsoluteDifferenceWideningUpperAndAdd_Vector128_UInt32+TestStruct, 48>(P) V00 loc0          NA
                                                            ▌    simd16 field V00._fld1 (fldOffset=0x0) -> V14 tmp10         (last use)
                                                            ▌    simd16 field V00._fld2 (fldOffset=0x10) -> V15 tmp11         (last use)
                                                            ▌    simd16 field V00._fld3 (fldOffset=0x20) -> V16 tmp12         d2 (last use) REG NA,d1,d2 $540
                                                            ┌──▌  t90    struct 
N449 ( 10,  7) [000091] -----------                         ▌  RETURN    struct REG NA $VN.Void

The local is marked as GTF_SPILLED (z) flag, and the spill flags indicate that the first field needs to be unspilled. But the first field has no register assignment to unspill into.

[jakobbotsch]

#88380 should fix the above issue.

[jakobbotsch]

/azp run runtime-coreclr superpmi-replay, runtime-coreclr jitstress, runtime-coreclr libraries-jitstress

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Azure Pipelines successfully started running 3 pipeline(s).

[jakobbotsch]

cc @dotnet/jit-contrib

Failures are known according to build analysis.

Some very minor diffs outside tests. arm64 has a handful in libraries.pmi. Diffs are for the normal reasons when promotion is enabled/disabled... Generally more precise liveness means some field writes/reads can sometimes be removed, while sometimes struct copies require larger code. And of course fields can be kept in registers over long ranges.

[tannergooding]

Overall I think this is a net improvement and makes sense for typical usages of the vector types.