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Sample code for using LAN8720 #14
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HI
saxonsoc binary linux from lawrie at github should use LAN8720 out of the box.
It will autodetect eth at boot it and you can start ssh and ping
around.
LAN8720 is directly pluggable to ULX3S. You can either
solder FEMALE 90° connector on top side on ULX3S and plug module
or solder MALE 0° (straight pins) on bottom side of ULX3S and use
old CDROM/IDE 40-pin flat cable (female both sides) to connect to LAN8270 module
LAN8270 is only for 3.3V power GP 9-13. If you connect it to 5V side, it
must goto trash.
…On 5/31/21, developandplay ***@***.***> wrote:
Hi @emard,
thank you for creating such a good ulx3s guide.
I did get the LAN8720 module to try out ethernet on the ulx3s.
First of all is there anything I need to bear in mind regarding the pyhsical
connection to the ulx3s?
Right now I just plugged it in from 9 to 13 like you mentioned in the
README.
Second do you have any example code for using the module?
I tried using it in Litex but I assume I wired somthing up improperly as the
my code doesn't work as expected.
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#14
|
Here is also elementary verilog example which will
do some elementary packeting on the module and leds
blinking but don't expect full TCPIP
https://github.com/emard/ulx3s-misc/tree/master/examples/eth/rmii/proj
…On 6/1/21, D EMARD ***@***.***> wrote:
HI
saxonsoc binary linux from lawrie at github should use LAN8720 out of the
box.
It will autodetect eth at boot it and you can start ssh and ping
around.
LAN8720 is directly pluggable to ULX3S. You can either
solder FEMALE 90° connector on top side on ULX3S and plug module
or solder MALE 0° (straight pins) on bottom side of ULX3S and use
old CDROM/IDE 40-pin flat cable (female both sides) to connect to LAN8270
module
LAN8270 is only for 3.3V power GP 9-13. If you connect it to 5V side, it
must goto trash.
On 5/31/21, developandplay ***@***.***> wrote:
> Hi @emard,
> thank you for creating such a good ulx3s guide.
> I did get the LAN8720 module to try out ethernet on the ulx3s.
>
> First of all is there anything I need to bear in mind regarding the
> pyhsical
> connection to the ulx3s?
> Right now I just plugged it in from 9 to 13 like you mentioned in the
> README.
>
> Second do you have any example code for using the module?
> I tried using it in Litex but I assume I wired somthing up improperly as
> the
> my code doesn't work as expected.
>
> --
> You are receiving this because you were mentioned.
> Reply to this email directly or view it on GitHub:
> #14
|
eheheeee, great testing, thanx!!
I was also happy when LAN8720 started working,
thanks to proper readme I could do it too, after almost a year :)
I had some hacks with init sequence for ST7789
to make it more reliable with some displays with
green tab stickers (probably some very early chip
releases).
…On 6/7/21, gojimmypi ***@***.***> wrote:
@emard this is a very cool example... thanks for sharing! I can confirm [it
works](https://gojimmypi.github.io/gridster-jekyll-theme/ulx3s-fpga-ethernet/)!
:)
![image](https://user-images.githubusercontent.com/13059545/120956689-f5a79b00-c708-11eb-8b8d-de6cb87aa1a6.png)
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#14 (comment)
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Actually you have green tab too :)
…On 6/7/21, D EMARD ***@***.***> wrote:
eheheeee, great testing, thanx!!
I was also happy when LAN8720 started working,
thanks to proper readme I could do it too, after almost a year :)
I had some hacks with init sequence for ST7789
to make it more reliable with some displays with
green tab stickers (probably some very early chip
releases).
On 6/7/21, gojimmypi ***@***.***> wrote:
> @emard this is a very cool example... thanks for sharing! I can confirm
> [it
> works](https://gojimmypi.github.io/gridster-jekyll-theme/ulx3s-fpga-ethernet/)!
> :)
>
> ![image](https://user-images.githubusercontent.com/13059545/120956689-f5a79b00-c708-11eb-8b8d-de6cb87aa1a6.png)
>
>
>
>
> --
> You are receiving this because you were mentioned.
> Reply to this email directly or view it on GitHub:
> #14 (comment)
|
I got to try the sample today and it works nicely. Thanks for providing the sample now I will try to get it running in Litex and report back. |
HI
Modules LAN8720 from ebay are slightly different there exist at least
2 visually different (bottom side is easier to make difference).
The problem is that module needs some "normal" power up default which means
pullups and pulldowns if when plugged to ULX3S at early boot time must keep the
same states as modules hardware default, which is not always possible because
FPGA takes time to boot from SPI flash so correct pullups are enabled
but too late, module already booted in wrong mode (usually 10Mbit or wrong clock
direction)
module has its own MDIO control interface,.that's similar to SPI and I
think all registers
can be set later. Probably a small verilog ROM initializer to just
write registers to
"normal" default should be good enough but my code doesn't have it yet.
…On 6/8/21, developandplay ***@***.***> wrote:
I got to try the sample today and it works nicely.
One thing that I noticed is as you mentioned in the project readme it's
crucial to first connect VCC and GND.
This can be achieved by plugging it in slightly angled.
Powering on the FPGA with the LAN8720 already plugged in doesn't work for
me.
Thanks for providing the sample now I will try to get it running in Litex
and report back.
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#14 (comment)
|
really nice example! Is the recommendation for using GP 9-13 also related to the fact that the 50 MHz RMII clock must end up at a PLCK capable pin? |
yes yes its pure chance that clock capable pin matches lan8270 module (I
didnt know about this
module when I was routing PCB :). Because of confusing docs there are some
other misroutings
but practicaly everything turned out to work well so the board was followed
with luck :)
…On Thu, Apr 21, 2022 at 5:17 PM Oliver Keller ***@***.***> wrote:
really nice example! Is the recommendation for using GP 9-13 also related
to the fact that the 50 MHz RMII clock must end up at a PLCK capable pin?
Because it does, but GN12 is part of the differential PCLKC7_1/PCLKT7_1
and I find the Lattice documentation on those quite confusing...
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thanks a lot for your quick response! Any other PCLK pin should work as well, right? I really enjoy how well thought out this board is, it doesn't look just like lucky coincidences to me. :-) It's probably the most sophisticated dev board I had in my hands. I'll be looking into high bandwidth transfers between ESP32 and ECP5. SDIO and RMII seem nice candidates. |
Thanx you like the board! It has been designed to have
some interesting parts with onboard routing not available on market.
ESP32 is practical tool but not too fast, on my ftp and wifi usually has
100-300 KB/s (1-3 Mbit/s) transfer to SD card or ECP5 from micropython.
New boards v3.1.7 routing supports ESP32 to RMII to external LAN8270
module (I tested that) or RMII ECP5 (linux or similar) should also work
but I have yet no demo example, however speed is still 100-300 KB/s
transfer rate on ESP32 RMII (tested with micropython and SD card)
It is very practical as connectivity feature.
Theoretically it can be faster maybe there's some optimizations
compile binary instead of micropython, router settings etc.
…On 4/22/22, Oliver Keller ***@***.***> wrote:
thanks a lot for your quick response! This means the PCLK pins are mostly
needed for using the fancy DDR blocks, I guess.
I really enjoy how well thought out this board is, it doesn't look just like
lucky coincidences to me. :-) It's probably the most sophisticated dev board
I had in my hands. I'll be looking into high bandwidth transfers between
ESP32 and ECP5. SDIO and RMII seem nice candidates.
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#14 (comment)
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Message ID: ***@***.***>
|
Hi @emard,
thank you for creating such a good ulx3s guide.
I did get the LAN8720 module to try out ethernet on the ulx3s.
First of all is there anything I need to bear in mind regarding the pyhsical connection to the ulx3s?
Right now I just plugged it in from 9 to 13 like you mentioned in the README.
Second do you have any example code for using the module?
I tried using it in Litex but I assume I wired somthing up improperly as the my code doesn't work as expected.
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