Better error messages and documentation about unsupported CPUs for KVM

[dseomn]

Description

I tried using gvisor in kvm mode, and it took a decent about of debugging to figure out that it wasn't working because my CPU doesn't support the XSETBV instruction. It would be great if the gvisor documentation on kvm vs ptrace said something about checking CPU flags to see if KVM is supported, and if the code checked the CPU flags early on and gave a clear error message explaining that the CPU isn't supported.

Is this feature related to a specific bug?

When I tried to use KVM mode on this CPU (only showing the first core, because I think all the cores are the same):

processor       : 0
vendor_id       : AuthenticAMD
cpu family      : 16
model           : 5 
model name      : AMD Athlon(tm) II X4 640 Processor
stepping        : 3 
microcode       : 0x10000c8
cpu MHz         : 800.000
cache size      : 512 KB
physical id     : 0
siblings        : 4
core id         : 0
cpu cores       : 4
apicid          : 0
initial apicid  : 0
fpu             : yes
fpu_exception   : yes
cpuid level     : 5
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid pni monitor cx16 opcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt nodeid_msr hw_pstate vmmc all npt lbrv svm_lock nrip_save
bugs            : tlb_mmatch apic_c1e fxsave_leak sysret_ss_attrs null_seg amd_e400 spectre_v1 spectre_v2
bogomips        : 5999.94
TLB size        : 1024 4K pages
clflush size    : 64
cache_alignment : 64
address sizes   : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate

gvisor gave this error message in the logs:

SIGILL: illegal instruction
PC=0xdf4aec m=0 sigcode=2
instruction bytes: 0xf 0x1 0xd1 0xc3 0xcc 0xcc 0xcc 0xcc 0xcc 0xcc 0xcc 0xcc 0xcc 0xcc 0xcc 0xcc 

From http://ref.x86asm.net/coder64.html#x0F01, I think that's an XSETBV instruction, and from #11 (comment) I think that's linked to the xsave CPU flag. I'm not filing a bug for that, because I think it's completely understandable for gvisor to not support hardware that old, it would just be nice to document what's required for support, and to have clearer error messages if the hardware isn't supported.

Do you have a specific solution in mind?

See above.

[ianlewis]

We now check if xsave (xgetbv, xsetbv etc.) is supported and only use it if it is.